From a904334b06a7b3bf255edadedd8b04055b2a0457 Mon Sep 17 00:00:00 2001 From: Ari Hirvonen Date: Sat, 12 Mar 2011 17:47:04 +0200 Subject: arm: tegra: ventana: fix dc out bit depth Set to 18bit which is what Ventana's panel expects. Enabled ordered dithering for smoother gradients. Bug 797698 Change-Id: Icfc7a9a9d27fc79c8b46cd1cf736d2447638e0ef Signed-off-by: Ari Hirvonen Reviewed-on: http://git-master/r/22717 Reviewed-by: Varun Colbert Tested-by: Varun Colbert --- arch/arm/mach-tegra/board-ventana-panel.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-tegra/board-ventana-panel.c b/arch/arm/mach-tegra/board-ventana-panel.c index f90fd6e18ea2..5859e51e70a5 100644 --- a/arch/arm/mach-tegra/board-ventana-panel.c +++ b/arch/arm/mach-tegra/board-ventana-panel.c @@ -224,6 +224,8 @@ static struct tegra_dc_out ventana_disp1_out = { .align = TEGRA_DC_ALIGN_MSB, .order = TEGRA_DC_ORDER_RED_BLUE, + .depth = 18, + .dither = TEGRA_DC_ORDERED_DITHER, .modes = ventana_panel_modes, .n_modes = ARRAY_SIZE(ventana_panel_modes), -- cgit v1.2.3