From 85a98a07d9f4811ff74a9695b465aee6eebb8833 Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Thu, 17 Mar 2016 13:41:38 +0800 Subject: MLK-12573 ARM: dts: set LCD_nPWREN low to make VLCD_3V3 output 3V3. Q901 (IRLML6401) is p-channel MOSET, need set pin1 (LCD_nPWREN) to low to let pin3 output be 3V3. Normally when pin1 is high, then pin3 output should be gated. It was working previously due to some leakage. Correct the enable logic from the software viewpoint. Signed-off-by: Robby Cai (cherry picked from commit c70398a0b2e860d0bd9478d956d077eff8e7ea4f) --- arch/arm/boot/dts/imx6ul-14x14-evk.dts | 2 +- arch/arm/boot/dts/imx6ul-9x9-evk.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/imx6ul-14x14-evk.dts b/arch/arm/boot/dts/imx6ul-14x14-evk.dts index 430da40ac867..ddec415b4607 100644 --- a/arch/arm/boot/dts/imx6ul-14x14-evk.dts +++ b/arch/arm/boot/dts/imx6ul-14x14-evk.dts @@ -141,7 +141,7 @@ #gpio-cells = <2>; reg = <0>; registers-number = <1>; - registers-default = /bits/ 8 <0xb7>; + registers-default = /bits/ 8 <0x57>; spi-max-frequency = <100000>; }; }; diff --git a/arch/arm/boot/dts/imx6ul-9x9-evk.dts b/arch/arm/boot/dts/imx6ul-9x9-evk.dts index 39c84e2dfea1..7a6e8c86a712 100644 --- a/arch/arm/boot/dts/imx6ul-9x9-evk.dts +++ b/arch/arm/boot/dts/imx6ul-9x9-evk.dts @@ -140,7 +140,7 @@ #gpio-cells = <2>; reg = <0>; registers-number = <1>; - registers-default = /bits/ 8 <0xb7>; + registers-default = /bits/ 8 <0x57>; spi-max-frequency = <100000>; }; }; -- cgit v1.2.3