From 3592e06b1bda505d04689493e092726550fed3b4 Mon Sep 17 00:00:00 2001 From: Stefan Eichenberger Date: Wed, 24 May 2023 18:12:28 +0200 Subject: arm64: dts: imx8mp: add bus_early clock to imx8mp-dwc3 Add a bus_early clock property to the imx8mp-dwc3 driver so that we can access register 0x382f0000 and 0x381f0000 after a suspend/resume cycle. Without this change suspend/resume will hang on resume. Upstream-Status: Inappropriate [other] This fix is only needed for the downstream kernel. In the upstream kernel they added a power-domain for all hsio devices (usb, pcie, etc.) and enable the clock there. However, backporting this solution would probably cause more issues for now. Fixes: cbd09f688623 ("usb: dwc3: imx8mp: Add support for setting SOC specific flags") Signed-off-by: Stefan Eichenberger --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index eaf06ad7ea1c..e2e34ee90173 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -2149,9 +2149,10 @@ compatible = "fsl,imx8mp-dwc3"; reg = <0x32f10100 0x8>, <0x381f0000 0x20>; - clocks = <&clk IMX8MP_CLK_HSIO_ROOT>, + clocks = <&clk IMX8MP_CLK_HSIO_AXI>, + <&clk IMX8MP_CLK_HSIO_ROOT>, <&clk IMX8MP_CLK_USB_ROOT>; - clock-names = "hsio", "suspend"; + clock-names = "bus_early", "hsio", "suspend"; interrupts = ; power-domains = <&hsiomix_pd>; #address-cells = <1>; @@ -2192,9 +2193,10 @@ compatible = "fsl,imx8mp-dwc3"; reg = <0x32f10108 0x8>, <0x382f0000 0x20>; - clocks = <&clk IMX8MP_CLK_HSIO_ROOT>, + clocks = <&clk IMX8MP_CLK_HSIO_AXI>, + <&clk IMX8MP_CLK_HSIO_ROOT>, <&clk IMX8MP_CLK_USB_ROOT>; - clock-names = "hsio", "suspend"; + clock-names = "bus_early", "hsio", "suspend"; interrupts = ; power-domains = <&hsiomix_pd>; #address-cells = <1>; -- cgit v1.2.3