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2017-11-29tegra: align graphics drivers with android binariesApalis-TK1_LXDE-Image_2.7b5-20171201Dominik Sliwa
Some functionality used by android binary drivers were missing. Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2014-06-25video: tegra: dc: accept CSC on window updateJon Mayo
This patch permits changing of the current CSC coefficients. It cannot be used with interlaced mode. Adds fields to skip window CSC programming if nothing has changed. Bug 1522546 Change-Id: If8fc6a5d634e4b300ef0de6a5913188fe1f1efb0 Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/422885 (cherry picked from commit 4aa22cd32362f0d91ef030bc0942c303714141cf) Reviewed-on: http://git-master/r/425986 GVS: Gerrit_Virtual_Submit Reviewed-by: Michael Frydrych <mfrydrych@nvidia.com> Tested-by: Michael Frydrych <mfrydrych@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2014-05-29Merge branch 'android-3.10' into rel-21Ishan Mittal
Bug 200004122 Bug 1511804 This merge takes AOSP commits from android-3.10 branch Change-Id: I07ec2468114db0366d63777142c9572bbfadbc45 Signed-off-by: Ishan Mittal <imittal@nvidia.com>
2014-05-02video: adf: fbdev: add stubs for kernels without ADF_FBDEVGreg Hackmann
Change-Id: I42e087cddc29f6b93749791606e80dbd3e6f59ce Signed-off-by: Greg Hackmann <ghackmann@google.com>
2014-04-08video: adf: add buffer padding quirkGreg Hackmann
Quirks specify common behaviors that vary slightly among devices, and which ADF must account for. The buffer padding quirk captures the way different devices fetch the last scanline in a buffer: some devices fetch an entire line (including padding to the pitch) while others only fetch up to the visible width. ADF's buffer size validation now takes this quirk into account. Change-Id: I828b13316e27621d8a9efd9d5fffa6ce12a525ff Signed-off-by: Greg Hackmann <ghackmann@google.com>
2014-04-02video:tegra: fix ioctl for 32/64bit compatibilityAnton Kondratenko
Changes "long int" to uint in order to ensure AARCH32/AARCH64 compatibility. Bug 1466413 Change-Id: I0c17ff7e8710a62b1c93aade08f7999be66a2c3e Signed-off-by: Anton Kondratenko <akondratenko@nvidia.com> Reviewed-on: http://git-master/r/390364 Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com> Reviewed-by: Thomas Cherry <tcherry@nvidia.com> Tested-by: Thomas Cherry <tcherry@nvidia.com>
2014-03-24video: adf: replace fbdev helper's open flag with refcountGreg Hackmann
A device's fb_info is shared between clients. fb_release() is called when each client is released, not just the last one. Since the fbdev helper needs to release its dma-buf when the last client goes away, it must keep its own reference count. fbmem and fbcon hold different locks while calling fb_release(), so explicit locking is needed. Change-Id: I42cd659f7633adba7c11f407d4b594bd43305d6a Signed-off-by: Greg Hackmann <ghackmann@google.com>
2014-03-07video: tegra: dc: fix structs for 64-bitJon Mayo
Add compat ioctls and clean up data structures where it would be simplier to break the old 64-bit APIs for a new one that works. Some user space binaries will have to be rebuilt after this patch, but those binaries were almost certainly already broken as the driver wasn't doing the right thing. adds 32-bit compat version of: TEGRA_DC_EXT_CONTROL_GET_OUTPUT_EDID TEGRA_DC_EXT_FLIP2 TEGRA_DC_EXT_SET_PROPOSED_BW TEGRA_DC_EXT_SET_LUT TEGRA_DC_EXT_GET_FEATURES updates struct tegra_dc_ext_flip_windowattr to be the same size in both environments. This allows these ioctls to work: TEGRA_DC_EXT_FLIP TEGRA_DC_EXT_FLIP3 Bug 1466416 Change-Id: I17b8ba1b1fc5ace659b7db99dd252c03e96273e8 Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/378129 Reviewed-by: Automatic_Commit_Validation_User
2014-03-07Revert "drivers: tegra: dc: support compat ioctls"Jon Mayo
This reverts commit 0ca988fecb9b58567f2019d9dc0530200e3f764f. Bug 1466416 Change-Id: I8393151c04a032834d7658d2f4181c0fedccb13a Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/378128
2014-02-25video: tegra: compat version of TEGRA_GET_MODEDBJon Mayo
Provide a compat version of FBIO_TEGRA_GET_MODEDB. Bug 1466416 Change-Id: Id976d9e5059d4bb81a25e1412941ecfcc38b4657 Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/373105 Reviewed-by: Automatic_Commit_Validation_User
2014-01-21drivers: tegra: dc: support compat ioctlsPeng Du
Support for compat ioctls of DC where userspace is 32bit and kernel is 64bit. Bug 1349118 Change-Id: Ie48d426eaddda4126b9088794585a4f5765facbc Signed-off-by: Peng Du <pdu@nvidia.com> Reviewed-on: http://git-master/r/274472 Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bo Yan <byan@nvidia.com>
2013-12-30Merge branch 'remotes/android/android-3.10' into dev-kernel-3.10Bharat Nihalani
Change-Id: I0c919e55654e0c224a5f8a5df80d9f49e92dbb37
2013-12-03video: tegra: dc: allow fence fds in flipRakesh Iyer
Modify flip to allow fence file descriptors instead of syncpoint information Bug 1356564. Change-Id: I84fad52524cddb037e3ddc4512d3cd85ba394cee Signed-off-by: Rakesh Iyer <riyer@nvidia.com> Reviewed-on: http://git-master/r/336299 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Lauri Peltonen <lpeltonen@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Jon Mayo <jmayo@nvidia.com> Tested-by: Jon Mayo <jmayo@nvidia.com>
2013-10-29video: tegra: dc: add asynchronous bw negotiation.Kevin Huang
Add asynchronous bandwidth negotiation support for display. Bug 1197598. Change-Id: I16c1ba1dcbe790cec0f6b907c5d4071dc3840629 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/299599 Tested-by: Xue Dong <xdong@nvidia.com> Reviewed-by: Chao Xu <cxu@nvidia.com>
2013-10-24video: adf: expose adf_modeinfo_set_{name,vrefresh} to driversGreg Hackmann
Change-Id: Id9f8b2184927a77b244ce0b33d619d6e44a0f17a Signed-off-by: Greg Hackmann <ghackmann@google.com>
2013-10-24video: adf: add helpers for validating custom formatsGreg Hackmann
Many custom formats look a lot like the standard ones, but with different subsampling, bpp, etc. Expose and document adf_buffer_validate()'s main body, so drivers can reuse its logic when validating these formats. Change-Id: I1d06981c9e5aab26f3ab2956c08c679f2c823bcc Signed-off-by: Greg Hackmann <ghackmann@google.com>
2013-10-24video: tegra: fb: Add compat ioctlTuomas Kulve
Bug 1352981 Change-Id: Ie103fd01a751744f9d879dbf91972021eb73e483 Signed-off-by: Tuomas Kulve <tkulve@nvidia.com> Reviewed-on: http://git-master/r/298883 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Peng Du <pdu@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2013-10-11video: adf: add informational flags to interfacesGreg Hackmann
Informational flags don't affect ADF directly but may be useful to clients. Currently used to indicate primary and external displays. Change-Id: I343c7f0148da0869244c8e818350e9855525df85 Signed-off-by: Greg Hackmann <ghackmann@google.com>
2013-10-11video: adf: add fbdev compatibility helperGreg Hackmann
Change-Id: I2b82bb625f805e8edb27799743b290dda5befb97 Signed-off-by: Greg Hackmann <ghackmann@google.com>
2013-10-11video: adf: add supported formats to adf_overlay_engine_dataGreg Hackmann
Change-Id: If2aa783b9ece60160f465bf697508fc58682e1bc Signed-off-by: Greg Hackmann <ghackmann@google.com>
2013-10-11video: adf: support "simple" buffersGreg Hackmann
Simple buffers are linear RGB buffers analogous to KMS's dumb buffers. Simple buffers can be allocated and posted to a display interface without any driver-private data. Internally, ADF drivers provide the driver-private data needed (if any) to post a simple buffer to the display. Change-Id: Ib0b737622eaf343111310f6623f99d69cf3807d2 Signed-off-by: Greg Hackmann <ghackmann@google.com>
2013-10-11video: adf: add memblock helperGreg Hackmann
Provides a dma-buf exporter for memblocks, mainly useful for ADF devices to wrap their bootloader logos Change-Id: I936a9b5df099ab6084d433fcaf50f3bc29f93289 Signed-off-by: Greg Hackmann <ghackmann@google.com>
2013-10-11video: add atomic display frameworkGreg Hackmann
Change-Id: I693257e269a99012cd0dbb57576ac222869cf4c7 Signed-off-by: Greg Hackmann <ghackmann@google.com>
2013-09-26video: tegra: dc: add API for selecting PREMULT_ALPHA cursor blendingAndy Ritger
Add TEGRA_DC_EXT_CURSOR_FORMAT_FLAGS_RGBA_PREMULT_ALPHA flag for tegra_dc_ext_cursor_image::flags to select premultiplied alpha. For consistency, rename TEGRA_DC_EXT_CURSOR_FLAGS_2BIT_LEGACY TEGRA_DC_EXT_CURSOR_FLAGS_RGBA_NORMAL to TEGRA_DC_EXT_CURSOR_FORMAT_FLAGS_2BIT_LEGACY TEGRA_DC_EXT_CURSOR_FORMAT_FLAGS_RGBA_NON_PREMULT_ALPHA (but retain the old names as aliases, for source-level backwards compatibility). Add new caps bits to be reported in tegra_dc_ext_control_capabilities::caps TEGRA_DC_EXT_CAPABILITIES_CURSOR_TWO_COLOR TEGRA_DC_EXT_CAPABILITIES_CURSOR_RGBA_NON_PREMULT_ALPHA TEGRA_DC_EXT_CAPABILITIES_CURSOR_RGBA_PREMULT_ALPHA Note that before this change the default RGBA cursor behavior on T114 was non-premultipled alpha, while on T124 it was premultipled alpha. Now, the default RGBA cursor behavior is consistently non-premultipled alpha. Existing T124 RGBA cursor users will need to use the new PREMULT_ALPHA flag. Update the cursor image format documentation in tegra_dc_ext.h Bug 1354320 Change-Id: I82b04c97dea1830ce2659c966ae2a1b59fa06028 Signed-off-by: Andy Ritger <aritger@nvidia.com> Reviewed-on: http://git-master/r/271749 GVS: Gerrit_Virtual_Submit Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2013-09-14video: tegra: dc: expose new color formatsAntoine Chauveau
Expose new planar and semi-planar color formats. These formats have already been added to dc.h. Bug 1311740 Change-Id: I26be6148acbacaadf8525e24e7d30bcd93eaf7b4 Signed-off-by: Antoine Chauveau <achauveau@nvidia.com> Reviewed-on: http://git-master/r/243704 Tested-by: Bhanu Murthy V <bmurthyv@nvidia.com> Reviewed-by: Chao Xu <cxu@nvidia.com>
2013-09-14video: tegra: dc: Add DP/LVDS support to dc/extChao Xu
Change-Id: I49617eedb7f5dd65fb032f9c9972612a75d01523 Signed-off-by: Chao Xu <cxu@nvidia.com> Reviewed-on: http://git-master/r/242519
2013-09-14driver: video: add low latency cursor supportXue Dong
Bug 1232181 Change-Id: I0277727f0b4d8ac63778f4c536c9b23e7dc3825d Signed-off-by: Xue Dong <xdong@nvidia.com> Change-Id: Id93f3c905e1976b979e0f931c75701a54fdcf254 Reviewed-on: http://git-master/r/236005 Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Chao Xu <cxu@nvidia.com>
2013-09-14tegra: video: add dc interlace mode supportXue Dong
Bug 1172562 Signed-off-by: Xue Dong <xdong@nvidia.com> Conflicts: arch/arm/mach-tegra/include/mach/dc.h drivers/video/tegra/dc/mode.c Change-Id: I9e33ae73c60e0d98c5009a2a72c243d598bf084f Signed-off-by: Xue Dong <xdong@nvidia.com> Reviewed-on: http://git-master/r/200502 GVS: Gerrit_Virtual_Submit Reviewed-by: Chao Xu <cxu@nvidia.com>
2013-09-14video: tegra: dc: add kernel blocklinear interfaceChao Xu
Change-Id: I2cc33844d07f34b5391c927293015294b45ae125 Signed-off-by: Chao Xu <cxu@nvidia.com> Reviewed-on: http://git-master/r/110199 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mark Stadler <mastadler@nvidia.com>
2013-09-14video: tegra: support pixel format byte swapJon Mayo
reserve upper bits of pixformat to indicate byte swizzle option. reorder and increase field sizes of tegra_dc structure. Change-Id: Ibd84dafcc478f6c8f51669f2db52270d5723961c Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/232768 (cherry picked from commit 1c6286c8c3d8fc2148281c59f38949824844db4e) Reviewed-on: http://git-master/r/231899 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
2013-09-14HDCP: export nvhdcp state using ioctlJames Zhao
Export nvhdcp state to user land to check hdcp link is verified before doing anything else. Reviewed-on: http://git-master/r/188466 (cherry picked from commit 4305e7007e73e361fc351d94eb76ce52ff074ed5) Change-Id: I2d40ce69d0726e6d7817462519a47e68a800c21d Signed-off-by: James Zhao <jamesz@nvidia.com> Reviewed-on: http://git-master/r/200908 Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2013-09-14video: tegra: dc: request bandwidth from isomgrJon Mayo
Report event TEGRA_DC_EXT_EVENT_BANDWIDTH through tegra_dc_ctrl device when there is not enough bandwidth. Bug 1169265 Change-Id: Ia95b1ecc7eb16db6f3a709e7c9efc59ab2490ead Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/207766 Reviewed-by: Automatic_Commit_Validation_User
2013-09-14video: tegra: dc: support cmu read in ioctl.Kevin Huang
Added two interfaces for cmu read. In kernel, the initial cmu values derive from either default cmu table (identical mapping) or the board file. TEGRA_DC_EXT_GET_CMU returns the cached cmu values which are the same as hw values. TEGRA_DC_EXT_GET_CUSTOM_CMU returns the cmu custom values if they are set in board file; otherwise return error. Notice for TEGRA_DC_EXT_GET_CMU, in the case cmu is off by default, we don't write cmu registers. So it returns zeros unless it is enabled. Bug 1221681 Change-Id: Ie976700b9d1f073e84d83fbdb2f25ecb5d7149db Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/202202 Reviewed-by: Harshada Kale <hkale@nvidia.com> Tested-by: Harshada Kale <hkale@nvidia.com>
2013-09-14video: tegra: dc: add advanced cursor supportKevin Huang
Support advanced display cursor for t11x and t14x. For t14x, window H is set to window mode by default in the sense that cursor is not necessary for most phones. It can be switched to cursor mode as below. echo 0 > /sys/class/graphics/fb0/device/win_h To switch cursor between normal and legacy mode, user can set flag of tegra_dc_ext_cursor through the ioctl TEGRA_DC_EXT_SET_CURSOR. Change-Id: If5ef50401b8a2b2fd22500636d07506983aee0b5 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/194210 Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com> Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
2013-09-14media: video: tegra: camera: move tegra_cameraJihoon Bang
Move tegra_camera from platform_driver to part of nvhost vi driver. Split tegra_camera.c file into multiple files incluidng camera.c, camera_power.c, camera_emc.c and camera_clk.c according to functionality. tegra_camera is registered/unregistered in nvhost vi driver. Bug 1189789 Reviewed-on: http://git-master/r/174508 (cherry picked from commit e503a08b809844b53b7737e504e9f376f4a8a1eb) Change-Id: Ia8e189e809e18e16b780d3ff064bc96db84ade85 Signed-off-by: Jihoon Bang <jbang@nvidia.com> Reviewed-on: http://git-master/r/194805 Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com> Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
2013-09-14video: tegra: dc: flip API for more than 3 windowsXue Dong
add new ioctl that supports flip of an arbitrary number of windows. Change-Id: I6368129092921c665db5a8063f714d9f8fc14e63 Signed-off-by: Xue Dong <xdong@nvidia.com> Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/193929 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com> Reviewed-by: Tuomas Kulve <tkulve@nvidia.com>
2013-09-14video: tegra: dc: add ioctl to expose CMU.Kevin Huang
Bug 1169109 Change-Id: I98ee2794724299113c7aab3a60703f2927c9ea8d Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/162990 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2013-09-14video: tegra: dc: Enable cursor window clippingPrashant Malani
Add a new ioctl to enable cursor clipping. Modify set_cursor_image_hw() to preserve cursor clipping status. Change-Id: I4af4c342fc008203c4d8148609587618e333c71f Signed-off-by: Prashant Malani <pmalani@nvidia.com> Reviewed-on: http://git-master/r/131270 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Rebase-Id: R44f6792eaf1ae5abdebac1786ff4051c349f1d32
2013-09-14video: tegra: dc: Add support to SCAN_COLUMN.Kevin Huang
SCAN_COLUMN is a new feature for display. Add support to it for 90 & 270 degree rotation. Bug 964993 Bug 911213 Change-Id: Iff9818d901a4ae09dffb833bf2cf4a888f1ecec5 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/130313 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com> Rebase-Id: R631c88af2834303d46a21b87dfaba2ffb7eb5843
2013-09-14video: tegra: dc: Export display feature table.Kevin Huang
Bug 992947 Change-Id: I0d1ecc9f8f042956cbe631779260a38573936616 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/105776 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Jon Mayo <jmayo@nvidia.com> Rebase-Id: Raaf16738c516385dbbd9474a427e05f3b675a82d
2013-09-14video: tegra: dc: add per window global alphaJon Mayo
Adds a global alpha parameter to each window. It provides a default alpha value for pixel formats that do not include alpha. Change-Id: I5465864877a727b4daed0eb32fb8219e2ccb663e Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/101806 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Rebase-Id: Rbca65e11501f8721a596b4906aaa767791868cda
2013-09-14video: tegra: add cursor mode flippingAdam Cheney
This change adds a flag to flip windows in cursor mode. Cursor mode will cause flips to be skipped over if there are newer flip requests waiting in the workqueue. Add CURSOR_MODE to caps bitfield. bug 942762 Change-Id: Ib52a0a5565f961cdd9650e4204cd65b86f96fee1 Signed-off-by: Adam Cheney <acheney@nvidia.com> Reviewed-on: http://git-master/r/90418 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Robert Morell <rmorell@nvidia.com> Rebase-Id: R179068b5bad6d40e1599b8b3597fb1659a61f8f9
2013-09-14video: tegra: add ioctl to query DC capabilitiesAdam Cheney
Defines a new ioctl for querying a bitfield of DC capabilities. The first defined caps bit is for "cursor mode" flipping support. bug 942631 Change-Id: Iea8a0dfe4e400e0dad4bb9f23509c3ac0ca532ba Reviewed-on: http://git-master/r/87066 Reviewed-by: Robert Morell <rmorell@nvidia.com> Tested-by: Adam Cheney <acheney@nvidia.com> Rebase-Id: R9cf72d8428495698fc5caebe4a0f8378a061c0c7
2013-09-14video: tegra: Add support for surface mirroringMichael Frydrych
This adds flags for horizontal and vertical surface mirroring, and updates the ioctl handling code to set the appropriate core dc mirroring flags when the dc_ext mirroring flags are passed. Bug 905578 Change-Id: Idbe0c95cb0807aa9e26ccfdc42cf4ef0dc9eb38f Reviewed-on: http://git-master/r/64110 Reviewed-by: Michael Frydrych <mfrydrych@nvidia.com> Tested-by: Michael Frydrych <mfrydrych@nvidia.com> Reviewed-by: Markus Holtmanns <mholtmanns@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Rebase-Id: R5795faa3988df9f87e669f40aab9b0281111a4b0
2013-09-14video: tegra: Add support for tiled surfacesRobert Morell
This adds a new flags field to the dc_ext flip ioctl, adds a flag for tiled surfaces, and updates the ioctl handling code to set the appropriate core dc tiling flag when the dc_ext tiled flag is passed. Bug 831397 Change-Id: I36cbf4a59173885a98209e559f77404bddcf54cd Reviewed-on: http://git-master/r/64109 Reviewed-by: Michael Frydrych <mfrydrych@nvidia.com> Tested-by: Michael Frydrych <mfrydrych@nvidia.com> Reviewed-by: Markus Holtmanns <mholtmanns@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Robert Morell <rmorell@nvidia.com> Rebase-Id: Rf741be9e6945b6b92699e26fb1745fafef4d8fe4
2013-09-14video: tegra: dc: support global fbdev gamma tableDavid Schalig
Add support to set a global gamma correction table via fbdev cmap API. The 3 Tegra DC windows have their own local gamma tables, which can either override or alter the global table. Bug 868060 Change-Id: I0be1c5e4afa8fd8c010b772c7808c883c0848ab4 Reviewed-on: http://git-master/r/60201 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R7e613b1c8ac469242172bd81db9dfba25176e0c3
2013-09-14video: tegra: dc: ioctl for setting gamma lutDavid Schalig
- enable gamma look-up hardware only when needed to save power - add flags field to ioctl TEGRA_DC_EXT_SET_LUT for forward compatibility Bug 868060 Change-Id: I690f8b8856e0b1acd6215907ca8bd78ecaf30b17 Reviewed-on: http://git-master/r/57736 Reviewed-by: David Schalig <dschalig@nvidia.com> Tested-by: David Schalig <dschalig@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Robert Morell <rmorell@nvidia.com> Rebase-Id: Rf6081a9372ba7d6e53a66b9b58a50a62ad409d9a
2013-09-14video: tegra: dc: add ioctl for setting gamma lutDavid Schalig
Adds ioctl TEGRA_DC_EXT_SET_LUT to dc_ext driver for setting a DC window's color palette. Bug 868060 Change-Id: I57ffcf3a3f91e76efd1c7f1f972b73c2edbaed82 Reviewed-on: http://git-master/r/56392 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Rebase-Id: R712c71151d0c3e3d274279f334bedf312e26e75d
2013-09-14video: tegra: Implement EDID queryRobert Morell
This change implements the TEGRA_DC_EXT_CONTROL_GET_OUTPUT_EDID ioctl in the dc_ext interface. It first adds a way for the tegra dc EDID module to export EDID data safely, without the risk of reading an incomplete or corrupted EDID in the presence of hotplug, by moving the actual data to a substructure with a lifetime maintained by a kref. Then, that support is plumbed through the hdmi block (which is currently the only way to get at the EDID) and out to userspace. Signed-off-by: Robert Morell <rmorell@nvidia.com> Bug 817119 Original-Change-Id: I78cd170e15322011b428cb71ffad2c0c3ea058ac Reviewed-on: http://git-master/r/49127 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Rebase-Id: Rafafc0a6fbacda5494b12162ad99a8c70ceeb2e0
2013-09-14video: tegra: dc: Separate allocations for U and VRobert Morell
Currently, dc_ext only takes a single nvmap memory ID per overlay, even in the YUV case (the U and V planes are expected to be differentiated using an offset from the beginning of the nvmap allocation). This is problematic for some software flows, such as certain video interlacing algorithms that will vary the luma plane while keeping the chrome plane constant. This change allows dc_ext clients to specify a different nvmap allocation for each of the Y, U, and V planes. If a YUV surface is used and no U or V plane allocation is specified, the old behavior is preserved: the U and V offsets are assumed to be within the same allocation as Y. Note: this changes the behavior of the offset parameter: the old code added offset to offset_u and offset_v when using it. The new code treats all three offsets as relative to the beginning of the allocation. It also fixes a bug in the code where offset was applied twice to the Y plane. I believe this is safe because the presence of this bug means that no existing clients are using offset != 0 (or if they are, they're already broken). Signed-off-by: Robert Morell <rmorell@nvidia.com> Bug 850882 Original-Change-Id: I230e03db25baaae73a3bdc0d45a2aec162b87fa4 Reviewed-on: http://git-master/r/41471 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Ra6dd17a50de7150edf104d2a6c9b3b9949919022
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