Age | Commit message (Collapse) | Author |
|
Bug 200004122
Conflicts:
drivers/cpufreq/cpufreq.c
drivers/regulator/core.c
sound/soc/codecs/max98090.c
Change-Id: I9418a05ad5c56b2e902249218bac2fa594d99f56
Signed-off-by: Ishan Mittal <imittal@nvidia.com>
|
|
commit b4c233057771581698a13694ab6f33b48ce837dc upstream.
We always put a NUL terminator one space past the end of the "vendor"
buffer. Walter Harms also pointed out that this should just use
kstrndup().
Fixes: 7d17c02a01a1 ('mtd: Add new SmartMedia/xD FTL')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
commit c69dbbf3335a21aae74376d7e5db50a486d52439 upstream.
Instead of writing to "nand->reg + REG_FMICSR" we write to "REG_FMICSR"
which is NULL and not a valid register.
Fixes: 8bff82cbc308 ('mtd: add nand support for w90p910 (v2)')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
commit 90445ff6241e2a13445310803e2efa606c61f276 upstream.
Crash detected on sam5d35 and its pmecc nand ecc controller.
The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc
(nand_base.c) when we write a sub page.
chip->ecc.hwctl function is not set when we are using PMECC controller.
As a workaround, set NAND_NO_SUBPAGE_WRITE for PMECC controller in
order to disable sub page access in nand_write_page.
Signed-off-by: Herve Codina <Herve.CODINA@celad.com>
Acked-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
Bug 1456092
Change-Id: I3021247ec68a3c2dddd9e98cde13d70a45191d53
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
|
|
commit 0566477762f9e174e97af347ee9c865f908a5647 upstream.
The ecc_stats.corrected count variable will already be incremented in
the above framework-layer just after this callback.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
Remove reference to MTD_NOR_TEGRA as this old driver has been removed.
Bug 1352942
Change-Id: I205b0b9bb411ea55ad4d8b742e6e9a0bc96c37f0
Signed-off-by: Ashwin Joshi <asjoshi@nvidia.com>
Reviewed-on: http://git-master/r/359300
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
Remove old tegra mapping driver.
Bug 1352942
Change-Id: I606b526e02a5e7ac84bb4023ebd058a286d55ef9
Signed-off-by: Ashwin Joshi <asjoshi@nvidia.com>
Reviewed-on: http://git-master/r/359298
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
This is the 3.10.24 stable release
Change-Id: Ibd2734f93d44385ab86867272a1359158635133b
|
|
commit 7b3d2fb92067bcb29f0f085a9fa9fa64920a6646 upstream.
[1] The gpmi uses the nand_command_lp to issue the commands to NAND chips.
The gpmi issues a DMA operation with gpmi_cmd_ctrl when it handles
a NAND_CMD_NONE control command. So when we read a page(NAND_CMD_READ0)
from the NAND, we may send two DMA operations back-to-back.
If we do not serialize the two DMA operations, we will meet a bug when
1.1) we enable CONFIG_DMA_API_DEBUG, CONFIG_DMADEVICES_DEBUG,
and CONFIG_DEBUG_SG.
1.2) Use the following commands in an UART console and a SSH console:
cmd 1: while true;do dd if=/dev/mtd0 of=/dev/null;done
cmd 1: while true;do dd if=/dev/mmcblk0 of=/dev/null;done
The kernel log shows below:
-----------------------------------------------------------------
kernel BUG at lib/scatterlist.c:28!
Unable to handle kernel NULL pointer dereference at virtual address 00000000
.........................
[<80044a0c>] (__bug+0x18/0x24) from [<80249b74>] (sg_next+0x48/0x4c)
[<80249b74>] (sg_next+0x48/0x4c) from [<80255398>] (debug_dma_unmap_sg+0x170/0x1a4)
[<80255398>] (debug_dma_unmap_sg+0x170/0x1a4) from [<8004af58>] (dma_unmap_sg+0x14/0x6c)
[<8004af58>] (dma_unmap_sg+0x14/0x6c) from [<8027e594>] (mxs_dma_tasklet+0x18/0x1c)
[<8027e594>] (mxs_dma_tasklet+0x18/0x1c) from [<8007d444>] (tasklet_action+0x114/0x164)
-----------------------------------------------------------------
1.3) Assume the two DMA operations is X (first) and Y (second).
The root cause of the bug:
Assume process P issues DMA X, and sleep on the completion
@this->dma_done. X's tasklet callback is dma_irq_callback. It firstly
wake up the process sleeping on the completion @this->dma_done,
and then trid to unmap the scatterlist S. The waked process P will
issue Y in another ARM core. Y initializes S->sg_magic to zero
with sg_init_one(), while dma_irq_callback is unmapping S at the same
time.
See the diagram:
ARM core 0 | ARM core 1
-------------------------------------------------------------
(P issues DMA X, then sleep) --> |
|
(X's tasklet wakes P) --> |
|
| <-- (P begin to issue DMA Y)
|
(X's tasklet unmap the |
scatterlist S with dma_unmap_sg) --> | <-- (Y calls sg_init_one() to init
| scatterlist S)
|
[2] This patch serialize both the X and Y in the following way:
Unmap the DMA scatterlist S firstly, and wake up the process at the end
of the DMA callback, in such a way, Y will be executed after X.
After this patch:
ARM core 0 | ARM core 1
-------------------------------------------------------------
(P issues DMA X, then sleep) --> |
|
(X's tasklet unmap the |
scatterlist S with dma_unmap_sg) --> |
|
(X's tasklet wakes P) --> |
|
| <-- (P begin to issue DMA Y)
|
| <-- (Y calls sg_init_one() to init
| scatterlist S)
|
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
commit 4355b70cf48363c50a9de450b01178c83aba8f6a upstream.
Some bright specification writers decided to write this in the ONFI spec
(from ONFI 3.0, Section 3.1):
"The number of blocks and number of pages per block is not required to
be a power of two. In the case where one of these values is not a
power of two, the corresponding address shall be rounded to an
integral number of bits such that it addresses a range up to the
subsequent power of two value. The host shall not access upper
addresses in a range that is shown as not supported."
This breaks every assumption MTD makes about NAND block/chip-size
dimensions -- they *must* be a power of two!
And of course, an enterprising manufacturer has made use of this lovely
freedom. Exhibit A: Micron MT29F32G08CBADAWP
"- Plane size: 2 planes x 1064 blocks per plane
- Device size: 32Gb: 2128 blockss [sic]"
This quickly hits a BUG() in nand_base.c, since the extra dimensions
overflow so we think it's a second chip (on my single-chip setup):
ONFI param page 0 valid
ONFI flash detected
NAND device: Manufacturer ID: 0x2c, Chip ID: 0x44 (Micron MT29F32G08CBADAWP), 4256MiB, page size: 8192, OOB size: 744
------------[ cut here ]------------
kernel BUG at drivers/mtd/nand/nand_base.c:203!
Internal error: Oops - BUG: 0 [#1] SMP ARM
[... trim ...]
[<c02cf3e4>] (nand_select_chip+0x18/0x2c) from [<c02d25c0>] (nand_do_read_ops+0x90/0x424)
[<c02d25c0>] (nand_do_read_ops+0x90/0x424) from [<c02d2dd8>] (nand_read+0x54/0x78)
[<c02d2dd8>] (nand_read+0x54/0x78) from [<c02ad2c8>] (mtd_read+0x84/0xbc)
[<c02ad2c8>] (mtd_read+0x84/0xbc) from [<c02d4b28>] (scan_read.clone.4+0x4c/0x64)
[<c02d4b28>] (scan_read.clone.4+0x4c/0x64) from [<c02d4c88>] (search_bbt+0x148/0x290)
[<c02d4c88>] (search_bbt+0x148/0x290) from [<c02d4ea4>] (nand_scan_bbt+0xd4/0x5c0)
[... trim ...]
---[ end trace 0c9363860d865ff2 ]---
So to fix this, just truncate these dimensions down to the greatest
power-of-2 dimension that is less than or equal to the specified
dimension.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
This is the 3.10.17 stable release
Conflicts:
drivers/usb/host/xhci.c
Change-Id: I6bd3b15ff92a0b94568b9d02e9bb1036becfca20
|
|
Keep NOR static mapping size configurable since different boards could
have NOR of different size.
Bug 1373849
Bug 1386803
Change-Id: If009fb09125ff3d6576c2a82ed82a8984bdf11d2
Signed-off-by: Ashwin Joshi <asjoshi@nvidia.com>
Reviewed-on: http://git-master/r/289676
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
|
|
commit 68e8078072e802e77134664f11d2ffbfbd2f8fbe upstream.
The code for NAND_BUSWIDTH_AUTO is broken. According to Alexander:
"I have a problem with attach NAND UBI in 16 bit mode.
NAND works fine if I specify NAND_BUSWIDTH_16 option, but not
working with NAND_BUSWIDTH_AUTO option. In second case NAND
chip is identifyed with ONFI."
See his report for the rest of the details:
http://lists.infradead.org/pipermail/linux-mtd/2013-July/047515.html
Anyway, the problem is that nand_set_defaults() is called twice, we
intend it to reset the chip functions to their x16 buswidth verions
if the buswidth changed from x8 to x16; however, nand_set_defaults()
does exactly nothing if called a second time.
Fix this by hacking nand_set_defaults() to reset the buswidth-dependent
functions if they were set to the x8 version the first time. Note that
this does not do anything to reset from x16 to x8, but that's not the
supported use case for NAND_BUSWIDTH_AUTO anyway.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reported-by: Alexander Shiyan <shc_work@mail.ru>
Tested-by: Alexander Shiyan <shc_work@mail.ru>
Cc: Matthieu Castet <matthieu.castet@parrot.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
commit 5ef4414f4bc26a19cfd5cd11aee9697a863e4d51 upstream.
get_peb_for_wl() removes the PEB from the free list.
If the WL subsystem detects that no wear leveling is needed
it cancels the operation and drops the gained PEB.
In this case we have to put the PEB back into the free list.
This issue was introduced with commit ed4b7021c
(UBI: remove PEB from free tree in get_peb_for_wl()).
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
- nor mapping driver, pca gmi & sram driver could be selected independently.
- efs & pflash should depend on nor mapping driver.
bug 1294819
Change-Id: I8d201f6aad5ec742ff57d2c11a2507b2bc4f5a8d
Signed-off-by: Nitin Sehgal <nsehgal@nvidia.com>
Reviewed-on: http://git-master/r/235036
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
Changes:
- Added support for 1144 date code chip by relaxing timeout period
bug 1257736
Change-Id: I76f18b54f8dcd12555b4e64dea281bb96dac32df
Signed-off-by: Ashutosh Patel <ashutoshp@nvidia.com>
Reviewed-on: http://git-master/r/230102
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Sehgal <nsehgal@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
- Added support for tegra pflash driver
bug 1182131
Change-Id: I67167057f288c3e661e8144021a1153985afe484
Signed-off-by: Ashutosh Patel <ashutoshp@nvidia.com>
Reviewed-on: http://git-master/r/218099
Reviewed-by: Nitin Sehgal <nsehgal@nvidia.com>
Tested-by: Nitin Sehgal <nsehgal@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
- Removed return EIO statement to detect half flash
if single NOR flash module is connected
bug 1234582
Change-Id: I4d7d2a9b871566cd23509eaaa5140fb093a164c1
Signed-off-by: Ashutosh Patel <ashutoshp@nvidia.com>
Reviewed-on: http://git-master/r/199384
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
-provide exclusive access to gmi bus.
-provide priority based access.
-support Asynchronous & synchronous requests.
bug 1047323
Change-Id: I0a630a9120e5a2abd3b0ff6b1e3250005b1136e1
Signed-off-by: Nitin Sehgal <nsehgal@nvidia.com>
Signed-off-by: Ashutosh Patel <ashutoshp@nvidia.com>
Reviewed-on: http://git-master/r/189918
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
Changes:
- Added EFS driver support for M2601 board
bug 1049391
Change-Id: I0637727136c88480203f9a6d3b437da7215630c1
Signed-off-by: Ashutosh Patel <ashutoshp@nvidia.com>
Reviewed-on: http://git-master/r/190267
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
after-upstream-android
Conflicts:
arch/arm/common/Kconfig
arch/arm/mm/Makefile
arch/arm/mm/cache-l2x0.c
arch/arm/mm/mmu.c
drivers/input/Kconfig
drivers/input/Makefile
drivers/power/Kconfig
kernel/futex.c
|
|
These changes have no effect if CONFIG_GCOV_KERNEL is not set in
defconfig. It is easier to trigger GCOV for kernel if this patch
is in by only setting the before mentioned flag.
Change-Id: I8aade309da2da62c4b3889bd84e4123ba8f182da
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/62999
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Rebase-Id: R4c238f707f1db600f188ae83426336753992b7be
|
|
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
|
|
Changes :
- Add support for 8GB flash in mtblock
- Change data type from unsigned long to unsigned long long
- Changed logic of finding sect_start to avoid 64-bit/64-bit division
bug 1182116
Change-Id: I782e509039e6d3a46870c641fec10cf9e3e2d73d
Signed-off-by: Ashutosh Patel <ashutoshp@nvidia.com>
Reviewed-on: http://git-master/r/188276
Reviewed-by: Bharath H S <bhs@nvidia.com>
Reviewed-by: Bhavesh Parekh <bparekh@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
Embedded entertainment platform's based on tegra soc from Nvidia
support large Nor flash parts ie 8GB.
This driver provides support for address & cs expansion needed to support
8GB NOR part.
bug 1046135
bug 1213008
Change-Id: Id405c4551dfd0faba1e9d80fd13b31082cc9acea
Signed-off-by: Nitin Sehgal <nsehgal@nvidia.com>
Reviewed-on: http://git-master/r/172748
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
The clk_enable/clk_disable pair of APIs are replaced with
clk_prepare_enable and clk_disable_unprepare.
This is needed for the migration to common clk framework.
Bug 920915
Change-Id: I4265a5ffe2e63bee62e8b1cc0c20c0a75da1de36
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/172213
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
|
|
The clk_enable/clk_disable pair of APIs are replaced with
clk_prepare_enable and clk_disable_unprepare.
This is needed for the migration to common clk framework.
Bug 920915
Change-Id: Ia1d135ada78486b21fdf7f2693ec72c7f126c250
Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
Reviewed-on: http://git-master/r/172212
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bhavesh Parekh <bparekh@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
|
|
Resolving build warnings.
pdat and edat are not really used uninitialized.
Reviewed-on: http://git-master/r/144844
(cherry picked from commit 59cced30f49f2ad69f04212f0dc4526f43684571)
Change-Id: I1bf640990e59845e1519096194ff5d926149fe39
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/168734
Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com>
Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
|
|
Support for following features
- Jedec probe
- Add entry for MSP14LV320 in jedec table
Bug 1046135
Change-Id: I82e4dd74eafed4598411e817e3a67a659b3d4326
Signed-off-by: Ashutosh Patel <ashutoshp@nvidia.com>
Reviewed-on: http://git-master/r/171289
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
|
|
Adding suspend and resume function for TegraNOR to restore the config
registers and timing register
bug 1010500
bug 1053727
Change-Id: I2531c0deaf17c02437b8fab9e15f9a90a9584110
Signed-off-by: Bhavesh Parekh <bparekh@nvidia.com>
Reviewed-on: http://git-master/r/141525
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
(cherry picked from commit 4c6b09264410173c66314d42d3379d53012a1882)
Reviewed-on: http://git-master/r/161870
Tested-by: Nitin Agrawal <nitina@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
|
|
Expanding NOR functionality to work with ADMUX and Burst mode for Micron
Support in E1853.
Bug 989919
Bug 966833
- Adding fields for picking MUX vs NONMUX and picking Async, Paging,
Burst mode for reads
- Added run time decision between them
- 1853 specific settings for Async NOR
- 1852 specific settings for NOR
- 1853 NOR timings changed
Reviewed-on: http://git-master/r/122286
(cherry picked from commit a242e7194c7de559d22fe5b275a8782086f10e50)
Change-Id: I79de1d52d4c7199c83b380c2fa6d8cae6b35f09d
Signed-off-by: Bob Johnston <BJohnston@nvidia.com>
Reviewed-on: http://git-master/r/124946
Tested-by: Bob Johnston <bjohnston@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Rebase-Id: Re82dd948df85ab5a618e8322ff3d8a02ab23d6c8
|
|
Replace internal function parse_mtd_partitions()
with new api mtd_device_parse_register()
Change-Id: Ic01543ed3e21d347e2ae24645d36fdc6b99f5273
Signed-off-by: Sandeep S. Trasi <strasi@nvidia.com>
Reviewed-on: http://git-master/r/123384
Tested-by: Bob Johnston <bjohnston@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Rebase-Id: R473bb07ba3fed0b4ad64df6e6202d8f461714351
|
|
add compilation flag to treat warnings as errors
handle error of variable declaration
bug 949219
Change-Id: Iac05d4d0e4c4cbf39a534b7aee32c0dac57ae49d
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/118027
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
Reviewed-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: Ra55af3ec052101f51e038ac0ab7b81aa5b6a46a2
|
|
add compilation flag to treat warnings as errors
bug 949219
Change-Id: Iac1b0e608ac5b19f5f84380ab7ffc76e14c3d7a0
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/118033
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Rebase-Id: R5bd3d4c83c25097f9a1e3709d96f5e74d0c37326
|
|
Call dma sync single api's to maintain coherency between
CPU, dma and device in data transfers.
bug 984029
bug 980884
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/105917
(cherry picked from commit ff5d25f4a5847c664a123ca02ad981df699d50b6)
Change-Id: Id77d8239186b70e731f0c93f6e52ce81fb7e43f4
Reviewed-on: http://git-master/r/108507
(cherry picked from commit d739cbdfebec5331ac88e44d99d04ebfc20cef06)
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Change-Id: Ibe9ec568fdbf34a1039eb61a9e8fba5d85d9829e
Reviewed-on: http://git-master/r/109544
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Rebase-Id: R695460d8bec75829abab5cc4faf45013ec931886
|
|
timing1_read was initialized with timing0 from nor platform data
changed the same to use timing1 from platform data instead of
timing0
Bug 934187
Change-Id: I04c41323de25fb2bb53dac91301cee9c0820707a
Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/95293
Reviewed-on: http://git-master/r/100904
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Amlan Kundu <akundu@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Rebase-Id: R09ae6b051fa547ba9743e40fe3716f11aa76a673
|
|
This patch add CFI version 1.5 support. It replaces
classic word programming by write buffer programming
and sets the FFS write size to 512 bytes.
The patch taken from spansion
bug 906309
Reviewed-on: http://git-master/r/89412
(cherry picked from commit 733c7ef4b9bdc52ac95095436a5cf83aa0296da5)
Change-Id: I63cbd0bad077e055d6efd4e2b4c7d26c608d1b66
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/91307
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Amlan Kundu <akundu@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Rebase-Id: Re053bf2137a2aeea545b41145b468a1eab66affb
|
|
On entering the power saving mode NAND controller registers are getting reset.
With this change resume will restore the controller registers' values.
Bug 933291
Change-Id: Ia1a43827b4b4a91ab1383bf07c3c0fe3068b666b
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/90883
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Rebase-Id: R0a9ee5bb3c56c7c2ff52f207b2d5e006bc534f13
|
|
Most of the large read requests passed by upper MTD block
layer are for highmem region which dma_map_single cannot
handle. Those requests were getting serviced by memcpy_fromio,
this was degrading performance. Moreover the memory region
passed to dma_map_single should be on cache line boundaries.
If the requirement is not met then system may crash due
to cache incoherency.
The approach added in this patch is to have a DMA coherent
memory buffer. Read device via DMA to this coherent buffer
and them memcpy it to user space pointer. This not only
fixes some bugs but also enhances the NOR read performance.
bug 928788
bug 898250
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/76866
(cherry picked from commit 1491c0461a627c3bb63b01e126585eff9922ba1a)
Change-Id: Ic8e24d2cc965f84bb97d2b6b29f27458aba17720
Reviewed-on: http://git-master/r/84026
Tested-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Rebase-Id: Ree1195ff059814e12710091201cae1df4ab661e9
|
|
The older add_mtd_device()/add_mtd_partitions() and
their removal are depricated. Replace uses with
mtd_device_register() and mtd_device_unregister().
bug 923135
Change-Id: I03790072d95ac27b4f11a6c522bb5d9de087a0df
Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-on: http://git-master/r/83073
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Rebase-Id: R0dd0e09f1395fe10c16d826c41c929157b4ddb2f
|
|
Remove the CONFIG_MTD_PARTITIONS preprocessor conditionals as
partitioning is always available.
Moreover as none of the drivers use CONFIG_MTD_PARTITIONS, this has
been undefined in Kconfig from 2.6.39 onwords.
The following commit 6a8a98b22b10f1560d5f90aded4a54234b9b2724 has
removed the CONFIG_MTD_PARTITIONS in Kconfig.
Bug: 923135
Change-Id: I8acb6ac2df26d9983b4cfe5869bc97a5861da573
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: http://git-master/r/75895
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Rebase-Id: Rc023a1e6c354c29d948934bf7e0b02f7e2575350
|
|
Remove the CONFIG_MTD_PARTITIONS preprocessor conditionals as
partitioning is always available.
Moreover as none of the drivers use CONFIG_MTD_PARTITIONS, this has
been undefined in Kconfig from 2.6.39 onwords.
The following commit 6a8a98b22b10f1560d5f90aded4a54234b9b2724 has
removed the CONFIG_MTD_PARTITIONS in Kconfig.
Bug: 923135
Change-Id: Id75da462c4ec58baf4da72a0f210b02517374de6
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: http://git-master/r/75871
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Reviewed-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Rebase-Id: R27ee41039e0f807d6140f874f0ccc8c9c01cef03
|
|
Bug 913416
Change-Id: I19f45bcd2c1ef9cb625728294b1dd53695e7d64b
Signed-off-by: Bhavesh Parekh <bparekh@nvidia.com>
Reviewed-on: http://git-master/r/69938
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: David Schalig <dschalig@nvidia.com>
Tested-by: David Schalig <dschalig@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Rebase-Id: Re7e3bfae2c225cb5df3479261a5be4cbfd851501
|
|
This patch adds NOR mapping driver for tegra2 and tegra3.
Signed-off-by: Manoj Chourasia<mchourasia@nvidia.com>
Change-Id: Ie773d024a49977e356d4a9d605910ca30f22a3f3
Reviewed-on: http://git-master/r/43566
Reviewed-on: http://git-master/r/62149
Tested-by: Manoj Chourasia <mchourasia@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R105eb2045de09f235b5dc9e17a935099b4a6a0bf
|
|
Rebase-Id: R3cff5fe5cf5f95670f9481dcbf66d230e3cde6b1
|
|
Added 4K page support.
Added 16-bit support
Added sys interfaces for various operations.
Added support for un-aligned page read.
Added setting timing values based on vendor-id/device-id.
Moved support for setting clock to platform from the driver.
Fixed OOB-Read/Write issues.
Original-Change-Id: Idf920c1cb0352dcda0282fa399d6c1f57a20736c
Reviewed-on: http://git-master/r/42347
Tested-by: Bhavesh Parekh <bparekh@nvidia.com>
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Rebase-Id: Rcdfc565556aab10d2f5a6d6f9d75102f5d0836d0
|
|
when the mtd partition command line format is used, ignoring the
return value left err set to the number of partitions, which was
later interpreted as an error return code for tegra_nand_probe,
which caused the MTD master to be unregistered (ultimately causing
NULL pointer derefs when mounting the root partition).
Change-Id: Icebfb295810554617c56deeafc91bc22cc43bb35
Signed-off-by: Gary King <gking@nvidia.com>
Rebase-Id: R62bc218fcdd9c5e54a6329fe75275e7df816691f
|
|
Change-Id: I6f0b18c5621bcf8fb6cde8e7b05828075db72594
CC: Dima Zavin <dima@android.com>
Signed-off-by: Colin Cross <ccross@android.com>
Rebase-Id: Ree5c92d9d77458747f0ee8ca2b5bb9d2f665f917
|
|
commit 930d800bded771b26d9944c47810829130ff7c8c upstream.
The omap2 nand device driver calls into the the elm code, which can
be a loadable module, and in that case it cannot be built-in itself.
I can see no reason why the omap2 driver cannot also be a module,
so let's make the option "tristate" in Kconfig to fix this allmodconfig
build error:
ERROR: "elm_config" [drivers/mtd/nand/omap2.ko] undefined!
ERROR: "elm_decode_bch_error_page" [drivers/mtd/nand/omap2.ko] undefined!
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Tony Lindgren <tony@atomide.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Cc: Afzal Mohammed <afzal@ti.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|