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2018-11-29gk20a: use kcalloc() to allocate arraysRolf Eike Beer
Signed-off-by: Rolf Eike Beer <eb@emlix.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-11-29gk20a: mark gk20a_init_pmu_setup_sw() staticRolf Eike Beer
Signed-off-by: Rolf Eike Beer <eb@emlix.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-11-29gk20a: do not BUG if the ioctl size does not matchRolf Eike Beer
Signed-off-by: Rolf Eike Beer <eb@emlix.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-11-29Tegra: fix potential one byte overflows when calling strncpy()Rolf Eike Beer
Causes build failures with gcc 8. Signed-off-by: Rolf Eike Beer <eb@emlix.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-06-21Merge tag 'tegra-l4t-r21.7' into toradex_tk1_l4t_r21.7-nextMarcel Ziswiler
Merge NVIDIA's latest Linux for Tegra aka L4T R21.7 Linux kernel changes from git://nv-tegra.nvidia.com/linux-3.10.git commit: e78bb38b883c42edf81766a1d557aed74458e08f Conflicts involved missing 24-bit LVDS support and a single whitespace aka tab difference in drivers/video/tegra/dc/sor.c. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-04-28gpu: nvgpu: add speculative load barrier (ctrl IOCTLs)Jeetesh Burman
Data can be speculatively loaded from memory and stay in cache even when bound check fails. This can lead to unintended information disclosure via side-channel analysis. To mitigate this problem insert a speculation barrier. bug 2039126 CVE-2017-5753 Change-Id: Ib6c4b2f99b85af3119cce3882fe35ab47509c76f Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1640500 Signed-off-by: James Huang <jamehuang@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1650050 (cherry picked from commit f293fa670fd2f4fbe170f1e372e9aa237283c67a) Signed-off-by: Jeetesh Burman <jburman@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1682715 Signed-off-by: Jeetesh Burman <jburman@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1698610 GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Tested-by: Bibek Basu <bbasu@nvidia.com>
2018-03-26gpu: nvgpu: Add ref counting to channelsAlex Waterman
Make sure that the VM owned by a channel lives for at least as long as that channel does. If the channel's VM is cleaned up before the channel then use-after-free bugs can occur. Bug: 31680980 NvBug 1825464 Bug: 1885921 Change-Id: I0711781492a764b643c2ed1da1b3ba87fda72744 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-psac.nvidia.com/r/#/c/9261 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> (cherry picked from commit e205f2720fcee61886e7979e9588602d691507ea) Reviewed-on: https://git-master.nvidia.com/r/1681801 GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com>
2018-03-09gpu: nvgpu: Validate buffer_offset argumentDebarshi Dutta
Validate the mapping_size argument in the VM mapping IOCTL before attempting to use the argument for anything. Manual Cherry pick - https://git-master.nvidia.com/r/1547046 Bug 1954931 Bug 1965443 Change-Id: I81b22dc566c6c6f89e5e62604ce996376b33a343 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1547046 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> (cherry picked from commit e68391690cfcc23b77c68aec3f9605badea226ed in dev-kernel) Reviewed-on: https://git-master.nvidia.com/r/1671883 GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com>
2017-11-29Merge tag 'tegra-l4t-r21.6' into toradex_tk1_l4t_r21.6Marcel Ziswiler
Merge NVIDIA's latest Linux for Tegra aka L4T R21.6 Linux kernel changes from git://nv-tegra.nvidia.com/linux-3.10.git commit: b271e8fa67a6d9c4600274a25636cfe00fdd1b68 Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Dominik Sliwa <dominik.sliwa@toradex.com>
2017-09-26Revert "gpu: nvgpu: Remove IOCTL FREE_OBJ_CTX"Debarshi Dutta
Bug 200336148 This reverts commit 2db040946ff8340485b2b33fe5a46f3166fa96f6. Change-Id: I8a80a7bd1bd8b1a949fba26b683ac1c9bebc0c04 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1534941 GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com>
2017-07-26gpu: nvgpu: Remove IOCTL FREE_OBJ_CTXDebarshi Dutta
We have never used the IOCTL FREE_OBJ_CTX. Using it leads to context being only partially available, and can lead to use-after-free. Bug 1885775 Change-Id: I9d2b632ab79760f8186d02e0f35861b3a6aae649 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1506479 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com>
2017-06-16gpu: nvgpu: Fix pgsz_idx used in gk20a_vm_alloc_space()Alex Waterman
Use the correct page size index for pgsz_idx in gk20a_vm_alloc_space(). Previously the page size itself was used, not the page size index. Bug 1837624 Change-Id: I652f5af5321c1c49dc8eb170d3f92f00c23d2b6f Signed-off-by: Alex Waterman <alexw@nvidia.com> (cherry picked from commit fd13e0e1c4e397335c24497a0f92c85934d6185f) Reviewed-on: http://git-master/r/1503371 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2017-05-22gpu: nvgpu: fix crash in gk20a_channel_releaseAingara Paramakuru
gk20a_channel_release() should bail if filp->private_data is NULL. This can happen as a result of gk20a_channel_release() being called when __gk20a_channel_open() fails in NVHOST_IOCTL_CHANNEL_OPEN. Bug 200014898 Change-Id: I32cc957aca46fcd4265a8052ac5be355b644b9f7 Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com> Reviewed-on: http://git-master/r/496138 (cherry picked from commit cb0db6618c42ab4c33574f09f212ab1ee9a0438a) Reviewed-on: http://git-master/r/1258588 Reviewed-by: Winnie Hsu <whsu@nvidia.com> Tested-by: Winnie Hsu <whsu@nvidia.com>
2017-05-05BACKPORT: drm: crtc: integer overflow in drm_property_create_blob()Shreshtha SAHU
The size here comes from the user via the ioctl, it is a number between 1-u32max so the addition here could overflow on 32 bit systems. This patch fixes a security vulnerability reported here: https://code.google.com/p/android/issues/detail?id=228947 Change-Id: I17ed8c6e30826074cfc6dd833deb423be9bd89c5 Fixes: f453ba046074 ('DRM: add mode setting support') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Cc: stable@kernel.org # v4.2 Signed-off-by: Dave Airlie <airlied@gmail.com> Bug 1846814 Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com> Change-Id: I308e65797972a0a0650bd96bd130dfd2fbe9c993 Reviewed-on: http://git-master/r/1262503 GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com>
2017-05-05gpu: nvgpu: add ptr validation for vm_map_bufferXia Yang
dma_buf_get() return value is now validated before passed down for further process. Bug 1812180 Bug 1883864 Change-Id: I443d676af2948c924f187988ab1c64c72b3e9232 Signed-off-by: Xia Yang <xiay@nvidia.com> Reviewed-on: http://git-master/r/1220869 (cherry picked from commit e6fe9437c609252cf28ac76d2e6b33e905eaa843 in rel-21) Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Change-Id: I443d676af2948c924f187988ab1c64c72b3e9232 Reviewed-on: http://git-master/r/1469135 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com>
2017-01-03gpu: nvgpu: initialize local variableDeepak Nibade
Initialize character array buf in gk20a_channel_ioctl() to zero Keeping it uninitialized can result in leaking kernel stack info to user space since we pass this buffer to UMD Bug 1793398 Change-Id: Iffd654dbaca3b4e3c8fd2ac270d0febd01c165b8 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1195862 (cherry picked from commit 118809f4bd07af20df2b6c012828834695a5fccf from dev-kernel linux-nvgpu.git) Reviewed-on: http://git-master/r/1269683 Reviewed-by: Matthew Pedro <mapedro@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Christian Gonzalez <christiang@nvidia.com> Tested-by: Christian Gonzalez <christiang@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com>
2016-10-26gpu: nvgpu: fix use-after-free in case of error notifierGagan Grover
A use-after-free scenario is possible where one thread in gk20a_free_error_notifiers() is trying to free the error notifier and another thread in gk20a_set_error_notifier() is still using the error notifier Fix this by introducing mutex error_notifier_mutex for error notifier accesses Take mutex in gk20a_free_error_notifiers() and in gk20a_set_error_notifier() before accessing notifier In gk20a_init_error_notifier(), set the pointer ch->error_notifier_ref inside the mutex and only after notifier is completely initialized Bug 1824788 Change-Id: I47e1ab57d54f391799f5a0999840b663fd34585f Reviewed-on: http://git-master/r/1233988 Signed-off-by: Gagan Grover <ggrover@nvidia.com> Signed-off-by: Gaurav Singh <gaursingh@nvidia.com> Reviewed-on: http://git-master/r/1236695 GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com>
2016-09-29video: tegra: host: gk20a: fix gcc-6 compilationMarcel Ziswiler
drivers/gpu/nvgpu/gk20a/mm_gk20a.c:124:18: error: 'gmmu_page_masks' defined but not used [-Werror=unused-const-variable=] static const u64 gmmu_page_masks[gmmu_nr_page_sizes] = { ~0xfffLL, ~0x1ffffLL }; ^~~~~~~~~~~~~~~ Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
2016-09-29gpu: nvgpu: fix gcc-6 compilationMarcel Ziswiler
drivers/gpu/nvgpu/gk20a/regops_gk20a.c:344:40: error: 'gk20a_runcontrol_whitelist_ranges' defined but not used [-Werror=unused-const-variable=] static const struct regop_offset_range gk20a_runcontrol_whitelist_ranges[] = { ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/nvgpu/gk20a/regops_gk20a.c:350:18: error: 'gk20a_runcontrol_whitelist_ranges_count' defined but not used [-Werror=unused-const-variable=] static const u32 gk20a_runcontrol_whitelist_ranges_count = ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/nvgpu/gk20a/regops_gk20a.c:366:40: error: 'gk20a_qctl_whitelist_ranges' defined but not used [-Werror=unused-const-variable=] static const struct regop_offset_range gk20a_qctl_whitelist_ranges[] = { ^~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/nvgpu/gk20a/regops_gk20a.c:373:18: error: 'gk20a_qctl_whitelist_ranges_count' defined but not used [-Werror=unused-const-variable=] static const u32 gk20a_qctl_whitelist_ranges_count = ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
2016-03-14gpu: nvgpu: validate wait notification offsetKonsta Holtta
Make sure that the notification object fits within the supplied buffer. Bug 1739182 Change-Id: Ifb66f848e3758438f37645be6f534f5b60260214 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1026431 (cherry picked from commit 2484c47f123c717030aa00253446e8756e1a0807) Reviewed-on: http://git-master/r/1030663 Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Tested-by: Matthew Pedro <mapedro@nvidia.com>
2016-03-14gpu: nvgpu: validate error notifier offsetKonsta Holtta
Make sure that the notifier object fits within the supplied buffer. Bug 1739183 Bug 1739932 Change-Id: I713574ce797ffc23cec10b5114f469dbadc68f1e Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1026410 (cherry picked from commit f476b93eb19b962b8760457102448bd533efc54d) Reviewed-on: http://git-master/r/1029379 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-09-28gpu: nvgpu: re-order POWERGATE_ENABLE operationsDeepak Nibade
re-order POWERGATE_ENABLE operations in opposite order of POWERGATE_DISABLE Bug 1679372 Change-Id: Ib72a0b80929e2dee2cf88a6d3d0f96d61c02307b Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/796459 (cherry picked from commit 7e2668f924a986d4bd7d1d2c383431a5e80d9968) Reviewed-on: http://git-master/r/801977 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-09-28gpu: nvgpu: enable powergate always while releasing debug sessionDeepak Nibade
Currently, while releasing the debug session we enable powergate only if a channel is bound to session If a session has no channel bound to it, and has powergate disabled, then we do not enable powergate when that session is closed Fix this by calling dbg_set_powergate(POWERGATE_ENABLE) always while releasing the session Refcounting and sanity checks in dbg_set_powergate() will take care of situation if powergate was not disabled by the session in first place Bug 1679372 Change-Id: I4e027393c611d3e8ab4f20e195f31871086da736 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/796999 cherry picked from commit 671dff8cb0605f865c5da32bd889e2a6fcf133fe) Reviewed-on: http://git-master/r/801986 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-07-23arm: tegra: fix debug build issueBibek Basu
Initialize uninitialized variables to get the build through Bug 1640594 Change-Id: Ia0788c5852bb8d68a79004e3f2fa1b3d2b9ca2fe Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/772239 GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2015-06-19Revert "video: tegra: Wait PMU finishes booting"Winnie Hsu
This reverts commit f69b7093accdacfa653b4bd45d78e04a2676dc2a. Bug 200055546 Bug 200114503 Change-Id: I165a3da9f418657d86bf39fbe3db2adc13762c87 Signed-off-by: Winnie Hsu <whsu@nvidia.com> Reviewed-on: http://git-master/r/759875
2015-06-12gpu: nvgpu: Disable channel when updating SMPC WARSandarbh Jain
When updating SMPC WAR for channel, it needs to be kicked out. This ensures that the updated information is re-read from context header. Bug 1579548 Change-Id: Ieadc6b65b057d7f48dc16fbc786c881ab7e5fcd5 Signed-off-by: Sandarbh Jain <sanjain@nvidia.com> Reviewed-on: http://git-master/r/756639 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2015-06-05gpu: nvgpu: Do not touch gr status maskTerje Bergstrom
GR status disable mask was never set, so driver always disabled all engines from status rollup. Change-Id: I500a127be9253294f73d1f42ce89b886471a9117 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/719141 (cherry picked from commit 34a5ffe7e7dcc4df5f3a11848b828e96c43d2c4d) Reviewed-on: http://git-master/r/752092 GVS: Gerrit_Virtual_Submit
2015-06-04gpu: nvgpu: gk20a: dma_alloc only if neededBibek Basu
if vpr memory is carved out, then only call dma_alloc for secure memory. Bug 200057068 Change-Id: I12557cfaa48f7db729ccab17d3151916d35ce0f1 Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/746153 GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2015-05-11vga: Make absence of device message as debug printPankaj Dabade
This patch converts message of absence of vga device as a debug print. This message comes when client tries to access device on PCI which is absent, in this case DSI. Bug 1481761 Change-Id: I7d83d39735e51bca8c789a86e517c0a040de57e8 Signed-off-by: Pankaj Dabade <pdabade@nvidia.com> Reviewed-on: http://git-master/r/739571 GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2015-02-17gk20a: Moved bind fecs to init_gr_supportMahantesh Kumbar
-Moved bind fecs from work queue to init_gr_support. -It makes all CPU->FECS communication to happen before booting PMU, and after we boot PMU, only PMU talks to FECS. So it removes possibility to race between CPU and PMU talking to FECS. Bug 200032923 Bug 1570774 Change-Id: I01d6d7f61f5e3c0e788d9d77fcabe5a91fe86c84 Reviewed-on: http://git-master/r/559733 Signed-off-by: Naveen Kumar S <nkumars@nvidia.com> (cherry picked from commit 1e63d8ae4056dbde82e1788decf7552f0b0af640) Reviewed-on: http://git-master/r/666712 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2015-02-17gpu: nvgpu: send ELPG init cmd after GR is readyVijayakumar
bug 200040021 bug 200032923 bug 1570774 Change-Id: Ic162902bd2f05abab9ebd37392ed56dc4c164ba8 Reviewed-on: http://git-master/r/539995 Signed-off-by: Naveen Kumar S <nkumars@nvidia.com> (cherry picked from commit 62e9ba6c8fbabcb77e0ec6267463f51ae319a0b3) Reviewed-on: http://git-master/r/666721 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2015-02-17gu: nvgpu: Add PMU state ELPG bootingTerje Bergstrom
Add PMU state ELPG booting. Prevent ISR processing when PMU is in OFF state. Bug 200006956 Change-Id: Ibcf69a2d81965cc87f520bf864c4425681f04531 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Naveen Kumar S <nkumars@nvidia.com> Reviewed-on: http://git-master/r/424769 (cherry picked from commit f9ce5a2cdf667f8e41f7ed4035678cc1198dc308) Reviewed-on: http://git-master/r/657487 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2015-01-19video: tegra: host: gk20a: invalidate TLB after PDE updateDeepak Nibade
Invalidate TLB after PDE udpate and before freeing the Page Table memory Stale TLBs during unmap can lead us to access invalid PTEs Bug 1577947 Change-Id: I46c6a7a9079570a8e2af8bb2a6687cfeec83a6f7 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/670324 (cherry-picked from commit e4cbdae09949d23ac338209924d35584c5d8d288) Reviewed-on: http://git-master/r/671197 Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
2015-01-19video: tegra: host: gk20a: fix PDE update sequenceDeepak Nibade
Current sequence : - delete page tables memory - update PDE entry and mark above page tables invalid With this sequence, it is possible to have valid PDE entries with already freed page table and this could lead us to invalid memory accesses. Fix this by switching the sequence as follows : - update PDE entry and mark page tables invalid - delete page tables memory Bug 1577947 Change-Id: Icc3a8c74bbf1bf59e41e0322cfc279d15690aa9d Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/670323 (cherry-picked from commit 56f738b4c4ee188ec1f69b91615cd9728ff18cf0) Reviewed-on: http://git-master/r/671196 Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
2015-01-14gpu: nvgpu: Allow suppressing WFI on submitTerje Bergstrom
Allow suppressing WFI when submitting work and requesting a fence back. Bug 1491545 Change-Id: Ic3d061bb4f116cf7ea68dbd6a1b2ace9f11d0ab5 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/390457 Reviewed-on: http://git-master/r/671029 GVS: Gerrit_Virtual_Submit Reviewed-by: Sibashis Mohapatra <sibashism@nvidia.com> Tested-by: Sibashis Mohapatra <sibashism@nvidia.com> Reviewed-by: Yogesh Kini <ykini@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2015-01-08gpu: nvgpu: reduce message severity to infoNaveen Kumar S
Shader informs user about context switch wait time. This doesn't affect any functionality. Hence changing print to info. bug 200015967 Change-Id: I7fbb562e43ee6ec1bc8ac01a51d3c9f19d5cb4cf Signed-off-by: Naveen Kumar S <nkumars@nvidia.com> Reviewed-on: http://git-master/r/662657 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Matthew Pedro <mapedro@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-01-06gpu: nvgpu: implement mapping for sparse allocationKirill Artamonov
Implement support for partial buffer mappings. Whitelist gr_pri_bes_crop_hww_esr accessed by fec during sparse texture initialization. bug 1456562 bug 1369014 bug 1361532 Change-Id: Ib0d1ec6438257ac14b40c8466b37856b67e7e34d Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com> Reviewed-on: http://git-master/r/375012 (cherry picked from commit a24470f69961508412402b9b06d5b71fbf6f7549) Reviewed-on: http://git-master/r/601754 Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2015-01-06video: tegra: Wait PMU finishes bootingsujeet baranwal
GPU PMU booting is in a separate thread(workqueue) and currently there is a race condition that PMU booting doesn't finish when "nvhost_gk20a_finalize_power_on" is returning. If the GPU starts to runtime powergate(nvhost_gk20a_prepare_poweroff) at that time, we left a unfinished PMU booting workqueue task there. So next time when this task starts running, GPU will be put into a bad state which causes lots of GPU errors. This patch adds a wait at the end of "nvhost_gk20a_finalize_power_on" , so that the race condition can be avoided. Bug 200055546 Change-Id: I4f2d0798fcadb4effc555a66f3c3e3061b18d246 Signed-off-by: Mark Zhang <markz@nvidia.com> Signed-off-by: sujeet baranwal <sbaranwal@nvidia.com> Reviewed-on: http://git-master/r/494065 (cherry picked from commit 3b9866a952ba0a1dea05d20bf32b6bcc9113f38b) Reviewed-on: http://git-master/r/655952 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2015-01-06gpu: nvgpu: Add boost once GPU is initializedTerje Bergstrom
Workaround for GPU hang if boost turns GPU on before it is initialized. Bug 1435870 Change-Id: I07d0617049612344ca7c494da8cb8d75789984e5 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/453375 (cherry picked from commit 260cf3d3fab941126eebf4bc977cb408587492eb) Reviewed-on: http://git-master/r/655951 Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2015-01-06gpu: nvgpu: Initialize ELPG ref-count early.Neil Gabriel
gk20a_pmu_disable_elpg can be called before the PMU driver has received and processed the INIT message from the PMU. If change ensures that the ELPG ref-count has been initialized to zero before that can happen. Bug 200016313 Bug 200055546 Change-Id: Ic80ec1ee69b1eb0499effb1abf556f78cb041f5e Signed-off-by: Neil Gabriel <ngabriel@nvidia.com> Reviewed-on: http://git-master/r/431927 Reviewed-on: http://git-master/r/436302 (cherry picked from commit dad127648262a76180259525ac660ffa8307f69b) Reviewed-on: http://git-master/r/655950 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-12-17gpu: nvgpu: update regops whitelistMatt Craighead
Remove an undesired register from the regops whitelist. Bug 1589712 Change-Id: I76e8ff1f4b68d6d5ce2c11adc08d984df7883e5e Signed-off-by: Matt Craighead <mcraighead@nvidia.com> Reviewed-on: http://git-master/r/663371 (cherry picked from commit 573a71d052ac18d34b5f4e984f8684cedea0396d) Reviewed-on: http://git-master/r/663998 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Eric Brower <ebrower@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-11-03gpu:nvgpu: update aelpg parameterMahantesh Kumbar
Updated aelpg parameter APCTRL_CYCLES_PER_SAMPLE_MAX_DEFAULT default value to 200 Bug 1536384 Bug 200043556 Change-Id: I090e50d0025f16c006429455d161bee26fc64173 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/455440 (cherry picked from commit 4442b73ba0a9fb9d9d6c9c19b319146365ebfa96) Reviewed-on: http://git-master/r/553687 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-10-17gpu: nvgpu: gk20a: check ctx valid bitMayank Kaushik
When determining the chid for the current context, first check the ctx valid bit. Bug 1485555 Change-Id: I6c3096d800a6cef38b656d525437a2c4f8b45774 Signed-off-by: Mayank Kaushik <mkaushik@nvidia.com> Reviewed-on: http://git-master/r/496140 (cherry picked from commit 20a7a9635e9f969782da6695d99bc99c4ed8fa32) Reviewed-on: http://git-master/r/555054 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-09-26gpu: nvgpu: Increase PBDMA timeoutTerje Bergstrom
PBDMA timeout can cause stale data in FIFO. Default value equals 1ms. Increase it to max. Bug 1537636 Change-Id: I1c6c6b10abaece3a64b77b9b3ef77ff726ff67cf Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/457047 (cherry picked from commit f516652f567a44e2e1c6313dccd3dc80172a980f) Reviewed-on: http://git-master/r/457067 (cherry picked from commit f5219cf5888502de3f6cabb2db3e8968b6d20b7c) Reviewed-on: http://git-master/r/504534 Reviewed-by: Automatic_Commit_Validation_User
2014-09-24video: tegra: host: gk20a: reduce gr delaysPrashant Malani
The delay value used in gr usleep_range calls is too high. We can start at a much lower value. Bug 200032452 Change-Id: I7d196d0e3be0a5cd84e8c4dad537fae043da6274 Signed-off-by: Prashant Malani <pmalani@nvidia.com> Reviewed-on: http://git-master/r/335234 (cherry picked from commit 49bb8436a534496c70e6238d3bc20ed280d5b654) Reviewed-on: http://git-master/r/504632 Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-09-19edp: sysedp : CPU/GPU priority depends on fGPUMatt Longnecker
Provide sysedp_dynamic_capping with the instantaneous GPU frequency when notifying it of the GPU load. Modify the gpu/cpu priority decision logic to choose CPU priority until GPU frequency gets "near" the CPU-priority-limited-GPU-fmax. Introduce the priority_bias debugfs parameter to facilitate tuning of "near". priority_bias takes a value from 0 to 100. Change-Id: I57df17d50cd8077a512b5932f4a304ca5e6992aa Signed-off-by: Matt Longnecker <mlongnecker@nvidia.com> Reviewed-on: http://git-master/r/481720 (cherry picked from commit b2ac745a45e273e849d7b190913ee97092fdebc2) Reviewed-on: http://git-master/r/498901 GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-08-21gpu: nvgpu: Never use KEPLER_C sync point incrementTerje Bergstrom
Bug 1497928 Change-Id: Ic3a2923ae73792e87145b6211e45e5ace3651ddc Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/482492 GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Tested-by: Prabhu Kuttiyam <pkuttiyam@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2014-08-04gpu: nvgpu: fix error handling for mutex_acquire()Deepak Nibade
Currently if pmu_mutex_acquire() fails, we disable ELPG and move ahead. But it is not clear why it is required to disable ELPG in case where we fail to acquire mutex. Hence skip disabling ELPG if mutex_acquire() fails Bug 1533644 Change-Id: I7e8e99a701d0ba071eb31ac17582b04072ee55eb Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/448131 (cherry picked from commit 789c256dd74e2b2b0481e25b2af1b2202ea6f582) Reviewed-on: http://git-master/r/450268 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Naveen Kumar S <nkumars@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-07-23gpu: nvgpu: return error from mutex_acquire() if pmu not initializedDeepak Nibade
In pmu_mutex_acquire(), we return zero (success) if pmu->initialized is not set Since mutex_acquire() was successful, we then call pmu_mutex_release() If now pmu->initialized is set in some other thread then we proceed to validate the mutex owner and end up causing below warning : pmu_mutex_release: requester 0x00000000 NOT match owner 0x00000008 Hence to fix this return error from mutex_acquire() and mutex_release() if pmu->initialized is not yet set and in that case we proceed to call elpg enable/disable Bug 1533644 Bug 200017082 Change-Id: Ifbb9e6a8e13f6478a13e3f9d98ced11792cc881f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Signed-off-by: Naveen Kumar S <nkumars@nvidia.com> Reviewed-on: http://git-master/r/439333 (cherry picked from commit 50497d4031103df1067f14ce4c1e14b15713efb9) Reviewed-on: http://git-master/r/440747 GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-07-07Revert "gpu: nvgpu: Dump offending push buffer fragment"Arto Merilainen
Channel and gpfifo allocations are entirely separated from each other, however, the code here assumes that active channel means that the channel also has a gpfifo. This reverts commit a24602f094380539788696d1b1567a4f4d914b17 which added gpfifo dump. Changing debug dumping to be safe requires refactoring the channel release code to use proper locking. Bug 200017498 Bug 1530226 Change-Id: I2fb02542a17dd56a0a9ce732b327e34b85ade8b9 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> (cherry picked from commit 3d37815d7660affeb9a4f23b0d17f870ed12dd33) Reviewed-on: http://git-master/r/434053 Reviewed-by: Emad Mir <emir@nvidia.com> Tested-by: Emad Mir <emir@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-23 09:33:34 +0000