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path: root/arch/x86/kernel/amd_nb.c
AgeCommit message (Expand)Author
2020-06-11x86/cpu: Rename cpu_data.x86_mask to cpu_data.x86_steppingJia Zhang
2016-07-27x86/amd_nb: Fix boot crash on non-AMD systemsBorislav Petkov
2015-05-06x86/gart: Check for GART support before accessing GART registersAravind Gopalakrishnan
2014-10-20x86, amd_nb: Add device IDs to NB tables for F15h M60hAravind Gopalakrishnan
2014-04-01Merge tag 'edac_for_3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bpLinus Torvalds
2014-02-27amd64_edac: Add support for newer F16h modelsAravind Gopalakrishnan
2014-01-25x86/AMD/NB: Fix amd_set_subcaches() parameter typeDan Carpenter
2013-08-12x86, amd_nb: Clarify F15h, model 30h GART and L3 supportAravind Gopalakrishnan
2013-04-30Merge branch 'x86-ras-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds
2013-04-19amd64_edac: Add Family 16h supportAravind Gopalakrishnan
2013-03-11x86: Constify a few itemsJan Beulich
2012-07-22Merge branch 'x86-mce-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds
2012-06-07x86, amd_nb: Export model 0x10 and later PCI idBorislav Petkov
2012-06-06x86/debug: Add KERN_<LEVEL> to bare printks, convert printks to pr_<level>Joe Perches
2012-01-11Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jb...Linus Torvalds
2012-01-06x86/PCI: amd: factor out MMCONFIG discoveryBjorn Helgaas
2011-12-21x86: Simplify code by removing a !SMP #ifdefs from 'struct cpuinfo_x86'Kevin Winchester
2011-03-31x86, amd-nb: Rename CPU PCI id define for F4Borislav Petkov
2011-03-17Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bpLinus Torvalds
2011-03-17PCI: Rename CPU PCI id defineBorislav Petkov
2011-03-03x86, amd-nb: Misc cleanliness fixesBorislav Petkov
2011-02-10x86: Adjust section placement in AMD northbridge related codeJan Beulich
2011-02-07x86, amd: Support L3 Cache Partitioning on AMD family 0x15 CPUsHans Rosenfeld
2011-01-26x86, amd: Extend AMD northbridge caching code to support "Link Control" devicesHans Rosenfeld
2011-01-26x86, amd: Enable L3 cache index disable on family 0x15Hans Rosenfeld
2011-01-11x86: Use PCI method for enabling AMD extended config space before MSR methodJan Beulich
2010-11-18x86, cacheinfo: Cleanup L3 cache index disable supportHans Rosenfeld
2010-11-18x86, amd-nb: Cleanup AMD northbridge caching codeHans Rosenfeld
2010-11-18x86, amd-nb: Complete the rename of AMD NB and related codeHans Rosenfeld
2010-10-01x86, amd_nb: Enable GART support for AMD family 0x15 CPUsAndreas Herrmann
2010-09-20x86, k8: Rename k8.[ch] to amd_nb.[ch] and CONFIG_K8_NB to CONFIG_AMD_NBAndreas Herrmann