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path: root/arch/arm/mach-tegra/sleep-t20.S
AgeCommit message (Expand)Author
2014-03-14ARM: tegra: remove CONFIG_USE_SECURE_KERNEL usageVarun Wadekar
2014-02-09Revert "ARM: tegra: trustzone: Single kernel to work in both secure and non-s...Varun Wadekar
2014-02-09ARM: tegra: trustzone: Single kernel to work in both secure and non-secure mode.Nitin Sehgal
2013-09-14ARM: Tegra: Add CONFIG_TEGRA_USE_SECURE_KERNELJames Zhao
2013-09-14ARM: Tegra: Keep L2 available while MMU is onAntti P Miettinen
2013-09-14ARM: tegra: Skip unnecessary L1 flush for all tegra chipsBo Yan
2013-09-14ARM: tegra: replace tegra_cpu_wfi with cpu_do_idleBo Yan
2013-09-14ARM: tegra20: remove irrelevant codeBo Yan
2013-09-14ARM: tegra11: Update cache flush/invalidate for power gatingBo Yan
2013-09-14unknown changes from android-tegra-nv-3.4Dan Willemsen
2013-09-14ARM: tegra20: pm: clean L1 data before wfiPrashant Gaikwad
2013-09-14arm: tegra20: pm: rework secondary LP2Prashant Gaikwad
2013-09-14arm: tegra: add Trusted Foundations hooks and driverChris Johnson
2013-09-14ARM: tegra20: pm: flush L1 data before exit coherencyPrashant Gaikwad
2013-09-14ARM: tegra: rethink the cpu suspend-resume code pathVarun Wadekar
2013-09-14ARM: tegra: remove usage of USE_TEGRA_CPU_SUSPENDVarun Wadekar
2013-09-14ARM: tegra: power: L2 cache sync only for CPU0 LP2Prashant Gaikwad
2013-09-14arm: tegra: Invalidate TLB/BTAC afer enabling coherencyPrashant Gaikwad
2013-09-14ARM: tegra: power: Correct PL310 virt addr calculationPuneet Saxena
2013-09-14arm: tegra: pm: issue a pl310 cache sync for tegra2Mayuresh Kulkarni
2013-09-14ARM: tegra: power: clear TLBs & BTAC after re-enabling L1 cacheJin Qian
2013-09-14ARM: tegra2: power: Fix reset race condition between the CPUsScott Williams
2013-09-14ARM: tegra2: power: Don't flush D-cache on aborted LP2 with L2Scott Williams
2013-09-14ARM: tegra: power: Save CPU context to non-cacheable stackScott Williams
2013-09-14ARM: tegra: power: Add stack frame debug checksScott Williams
2013-09-14ARM: tegra: power: Define push/pop context register macrosScott Williams
2013-09-14ARM: tegra: power: Use uniform save/restore register setScott Williams
2013-09-14ARM: tegra: power: Consolidate CPU context save and SMP exitScott Williams
2013-09-14ARM: tegra: Use common coherency exit function for Tegra2Scott Williams
2013-09-14ARM: tegra: power: Clean up stack pointer handlingScott Williams
2013-09-14ARM: tegra: power: Split CPU context save and coherency exitScott Williams
2013-09-14ARM: tegra: Redesign Tegra CPU reset handlingScott Williams
2013-09-14ARM: tegra2: Fix CONFIG_HOTPLUG_CPU dependenciesScott Williams
2013-09-14ARM: tegra: Rename flow control registersScott Williams
2013-09-14ARM: tegra: Always compile sleep.SScott Williams
2013-09-14ARM: tegra: sleep: Remove hard-coded register offsetScott Williams
2013-09-14ARM: tegra: Split sleep.S for Tegra2Scott Williams
2013-09-14ARM: tegra: power: Prefer movw/movt for loading addressesScott Williams
2013-09-14ARM: tegra: sleep: flush tlbs when exiting wfiColin Cross
2013-09-14ARM: tegra: Add suspend supportColin Cross
2013-09-13Revert "ARM: tegra: rename the file of "sleep-tXX" to "sleep-tegraXX""Dan Willemsen
2012-11-15ARM: tegra: rename the file of "sleep-tXX" to "sleep-tegraXX"Joseph Lo
2012-11-05ARM: tegra: remove unnecessary includes of <mach/*.h>Stephen Warren
2012-09-13ARM: tegra20: add CPU hotplug supportJoseph Lo
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