Age | Commit message (Collapse) | Author |
|
Micrel KSZ9131 PHY LED behavior is not correct when configured in
Individual Mode, LED1 (Activity LED) is in the ON state when there is
no-link.
Workaround this by setting bit 9 of register 0x1e after verifying that
the LED configuration is Individual Mode.
This issue is described in KSZ9131RNX Silicon Errata DS80000693B [*]
and according to that it will not be corrected in a future silicon
revision.
[*] https://ww1.microchip.com/downloads/en/DeviceDoc/KSZ9131RNX-Silicon-Errata-and-Data-Sheet-Clarification-80000863B.pdf
Upstream-Status: Backport [0316c7e66bbd16cf2d01a4e2f5afa6afb01278f2]
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Philippe Schenker <philippe.schenker@toradex.com>
|
|
When adding the bus_early device tree property, bus_early_clk was
incorrectly used as name. This commit changes the property name to
bus_early, which is consistent with the other clocks.
Upstream-Status: Inappropriate [other]
This fix is only needed for the downstream kernel. In the upstream
kernel they added a power-domain for all hsio devices (usb, pcie, etc.)
and enable the clock there. However, backporting this solution would
probably cause more issues for now.
Fixes: 4d948676c55f("usb: dwc3: imx8mp: add bus_early_clk")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
|
|
Add a bus_early clock property to the imx8mp-dwc3 driver so that we can
access register 0x382f0000 and 0x381f0000 after a suspend/resume
cycle. Without this change suspend/resume will hang on resume.
Upstream-Status: Inappropriate [other]
This fix is only needed for the downstream kernel. In the upstream
kernel they added a power-domain for all hsio devices (usb, pcie, etc.)
and enable the clock there. However, backporting this solution would
probably cause more issues for now.
Fixes: cbd09f688623 ("usb: dwc3: imx8mp: Add support for setting SOC specific flags")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
|
|
Add a bus_early_clk which is the same clock as for the usb controllers
child. This is necessary because the mentioned commit in fixes is
accessing registers which need the IMX8MP_CLK_HSI_AXI clock to be
enabled. Without this fix suspend/resume is not working properly if no
USB-devices are connected.
rtcwake -s 5 -m mem -d rtc1
It will try to wakeup after 5 seconds but hangs afterward.
Upstream-Status: Inappropriate [other]
This fix is only needed for the downstream kernel. In the upstream
kernel they added a power-domain for all hsio devices (usb, pcie, etc.)
and enable the clock there. However, backporting this solution would
probably cause more issues for now.
Fixes: cbd09f688623 ("usb: dwc3: imx8mp: Add support for setting SOC specific flags")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
|
|
The controller's power may be powered off during system suspend. This
will add suspend/resume support when the controller suffers power lost.
Upstream-Status: Backport [2f64d6a6cdfbd992e8a8c481ebf79bfa9a71325b]
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Link: https://lore.kernel.org/r/20221013151442.3262951-4-xu.yang_2@nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
The suspend/resume code is broken for i.MX 8 CPUs. When waking up from
suspend it might happen that devices are not recognized anymore. To
reproduce do:
root@apalis-imx8-07107223:~# lsusb -t
/: Bus 03.Port 1: Dev 1, Class=root_hub, Driver=ci_hdrc/1p, 480M
|__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/3p, 480M
|__ Port 1: Dev 4, If 0, Class=Wireless, Driver=btusb, 480M
|__ Port 1: Dev 4, If 1, Class=Wireless, Driver=btusb, 480M
|__ Port 2: Dev 3, If 0, Class=Hub, Driver=hub/4p, 480M
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
/: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
root@apalis-imx8-12345678:~# rtcwake -s 1 -m mem -d rtc1
root@apalis-imx8-07107223:~# lsusb -t
/: Bus 03.Port 1: Dev 1, Class=root_hub, Driver=ci_hdrc/1p, 480M
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
/: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
We remove this broken code to replace it with the upstream code for
suspend and resume.
Upstream-Status: Inappropriate [other]
This is an issue of the downstream driver. We replace the broken
suspend/resume with the upstream solution.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
|
|
If the PCIe PLL locking fails we also have to disable vpcie because it
was already enabled before. Without this commit we get a warning when
the kernel tries to free the vpcie regulator.
Upstream-Status: Pending
Mainline for i.MX 8X does not support PCIe yet, this patch cannot be
upstreamed as of now.
Fixes: f6bf1945c5d5 ("PCI: imx: Do not hang if REFCLK is missing")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
|
|
There are situations when PCIe probes after SATA so that Wifi does not
come up. By compiling the SATA driver as a module we workaround this
issue.
Upstream-Status: Inappropriate [Configuration]
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
|
|
This reverts commit 2b311be08a61793e26757d5239ad9b79222962e5.
This patch breaks SATA. We will apply another workaround which is known
to work.
Upstream-Status: Inappropriate [other]
The reverted commit was never sent upstream
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
|
|
There is a clock dependency between the ahci-imx driver and the PCIe
driver on i.MX8 which causes the PCIe link to never come up. It happens
every 20-100 reboots when the SATA driver probes before PCIe. By never
disabling the APB clock in the SATA driver this issue goes away. In BSP5
we compiled the SATA driver as a module and the SATA driver was probing
after the PCIe driver, therefore we could not see the issue there.
Upstream-Status: Inappropriate [other]
This is an ugly workaround that should not land upstream. We try to get
help from NXP regarding this issue to find a proper solution.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
|
|
We used regulator-settling-time-us for the wifi regulator which is
wrong for regulator-fixed. We have to use startup-delay-us instead.
Upstream-Status: Pending
Mainline for i.MX 8 does not support PCIe yet, this patch cannot be
upstreamed as of now.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
|
|
Rename the wifi regulator to what is the net name in the schematic.
Upstream-Status: Pending
Mainline for i.MX 8 does not support PCIe yet, this patch cannot be
upstreamed as of now.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
|
|
Replace gpio-hogs by using the hsio clock to enable the PCIe reference
clock for Wifi and vcie-supply to power on the Wifi module. With this
change the gpios will not be touched when Wifi is disabled.
Upstream-Status: Pending
Mainline for i.MX 8X does not support PCIe yet, this patch cannot be
upstreamed as of now.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
|
|
Reorder the properties in the pcie nodes according to upstream rules.
Upstream-Status: Pending
Mainline for i.MX 8 does not support PCIe yet, this patch cannot be
upstreamed as of now.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
|
|
We set the same pcie and sata clock as the include files. This commit
removes redundancy.
Upstream-Status: Pending
Mainline for i.MX 8 does not support PCIe yet, this patch cannot be
upstreamed as of now.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
|
|
Use the vpcie-supply property instead of epdev_on-supply. This property
is also available in the upstream bsp and is therefore preferred.
Upstream-Status: Pending
Mainline for i.MX 8 does not support PCIe yet, this patch cannot be
upstreamed as of now.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
|
|
Use the hsio clocks for pcie and sata as NXP does in their device tree.
We can therefore remove the pcie_ext and sata_ext properties and don't
have to add any special properties.
Upstream-Status: Pending
Mainline for i.MX 8 does not support PCIe yet, this patch cannot be
upstreamed as of now.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
|
|
Set the correct gpios for the hsio clocks. This will allow us to use the
predefined hsio clocks from NXP to enable the pcie and sata clocks.
Upstream-Status: Pending
Mainline for i.MX 8 does not support PCIe yet, this patch cannot be
upstreamed as of now.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
|
|
Remove the gpio hogs for the pcie and sata clocks. We want to use a
gpio-gate-clock instead.
Upstream-Status: Pending
Mainline for i.MX 8 does not support PCIe yet, this patch cannot be
upstreamed as of now.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
|
|
i.MX8, i.MX8X, i.MX8XP and i.MX8XL SOC device trees are all based on
imx8-ss-*.dtsi files. For i.MX8X and i.MX8XP these device trees
should be updated with some peripherals removed or updated, similar
to i.MX8XL (imx8dxl-ss-*.dtsi files). However, it looks like only
i.MX8 and i.MX8XL are up to date, but for i.MX8X and i.MX8XP some
of the peripherals got inherited from imx8-ss-*.dtsi files, but in
reality they are not present on SOC.
As a result, during resource partition ownership check U-Boot receives
messages from SCU firmware about these resources not owned by boot
partition. In reality, these resources are not owned by anyone, as
they simply does not exist, but are defined in Linux device tree.
This change removes those peripherals, which are listed during
U-Boot resource partition ownership check as warnings:
## Flattened Device Tree blob at 9d400000
Booting using the fdt blob at 0x9d400000
Loading Device Tree to 00000000fd622000, end 00000000fd66efff ... OK
Disable pwm@5a190000 rsrc 188 not owned
Disable clock-controller@5a590000 rsrc 188 not owned
Starting kernel ...
Upstream-Status: Inappropriate [other]
The issue is not present in upstream since these nodes are not present there,
only downstream is affected.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
|
|
i.MX8, i.MX8X, i.MX8XP and i.MX8XL SOC device trees are all based on
imx8-ss-*.dtsi files. For i.MX8X and i.MX8XP these device trees
should be updated with some peripherals removed or updated, similar
to i.MX8XL (imx8dxl-ss-*.dtsi files). However, it looks like only
i.MX8 and i.MX8XL are up to date, but for i.MX8X and i.MX8XP some
of the peripherals got inherited from imx8-ss-*.dtsi files, but in
reality they are not present on SOC.
As a result, during resource partition ownership check U-Boot receives
messages from SCU firmware about these resources not owned by boot
partition. In reality, these resources are not owned by anyone, as
they simply does not exist, but are defined in Linux device tree.
This change removes those peripherals, which are listed during
U-Boot resource partition ownership check as warnings:
## Flattened Device Tree blob at 9d400000
Booting using the fdt blob at 0x9d400000
Loading Device Tree to 00000000fd652000, end 00000000fd67efff ... OK
Disable clock-controller@585a0000 rsrc 411 not owned
Disable clock-controller@5a4d0000 rsrc 62 not owned
Starting kernel ...
Upstream-Status: Inappropriate [other]
The issue is not present in upstream since these nodes are not present there,
only downstream is affected.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
|
|
i.MX8, i.MX8X, i.MX8XP and i.MX8XL SOC device trees are all based on
imx8-ss-*.dtsi files. For i.MX8X and i.MX8XP these device trees
should be updated with some peripherals removed or updated, similar
to i.MX8XL (imx8dxl-ss-*.dtsi files). However, it looks like only
i.MX8 and i.MX8XL are up to date, but for i.MX8X and i.MX8XP some
of the peripherals got inherited from imx8-ss-*.dtsi files, but in
reality they are not present on SOC.
As a result, during resource partition ownership check U-Boot receives
messages from SCU firmware about these resources not owned by boot
partition. In reality, these resources are not owned by anyone, as
they simply does not exist, but are defined in Linux device tree.
This change removes those peripherals, which are listed during
U-Boot resource partition ownership check as warnings:
## Flattened Device Tree blob at 9d400000
Booting using the fdt blob at 0x9d400000
Loading Device Tree to 00000000fd652000, end 00000000fd67efff ... OK
Disable clock-controller@59580000 rsrc 512 not owned
Disable clock-controller@5ac90000 rsrc 102 not owned
Starting kernel ...
Upstream-Status: Submitted [https://lore.kernel.org/all/20230417173830.19401-1-andrejs.cainikovs@toradex.com/]
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
|
|
Remove GPIO3_IO10 from Iris carrier board pinctrl configuration,
this is already defined in the SOM dtsi since this is a
standard SOM functionality (wake-up button).
Duplicating it leads to the following error message
imx8qxp-pinctrl scu:pinctrl: pin IMX8QXP_QSPI0A_DATA1 already requested
Upstream-Status: Submitted [https://lore.kernel.org/all/20230417173830.19401-1-andrejs.cainikovs@toradex.com/]
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
|
|
Each carrier board device tree except the eval board one already override
iomuxc pinctrl property to configure unused pins as gpio.
So move also the pinctrl property to eval board device tree.
Leave the pin group definition in imx8x-colibri.dtsi to avoid duplication
and simplify configuration of gpio.
Upstream-Status: Submitted [https://lore.kernel.org/all/20230417173830.19401-1-andrejs.cainikovs@toradex.com/]
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
|
|
Fix pinctrl groups to have SODIMM 75 only in one group.
Remove configuration of the pin at SoM level because it is normally
used as CSI_MCLK at camera interface connector.
Without this fix it is not possible, without redefining iomuxc pinctrl,
to use CSI_MCLK signal and leads to the following error messages:
imx8qxp-pinctrl scu:pinctrl: pin IMX8QXP_CSI_MCLK already requested
imx8qxp-pinctrl scu:pinctrl: pin-147 (16-003c) status -22
Upstream-Status: Submitted [https://lore.kernel.org/all/20230417173830.19401-1-andrejs.cainikovs@toradex.com/]
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
|
|
Add USB Host and USB OTG (Client/Host switching) to the Aster carrier
board.
Upstream-Status: Pending
- No support as of now in upstream linux.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
|
|
Move usb extcon gpio and usbh vbus regulator nodes to SoM device tree
include file as they are standard functionality.
Keep those nodes disabled by default to allow non-standard carrier-board
design to use the pristine SoM dtsi file.
Upstream-Status: Pending
- No USB support as of now in upstream linux.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
|
|
Increase the CMA memory size to be enough to play full HD video using
gst-play.
Upstream-Status: Pending
- This can and should be upstreamed.
Fixes: 54c00ffd99e0 ("arm64: dts: colibri-imx8x: Add cma memory")
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
|
|
Add support for Wi-Fi that is connected to the SoC with PCIe. Make sure
the clock is enabled with a GPIO Hog. Do also make sure the GPIO for
power-down is high (power enabled).
Upstream-Status: Pending
- There is currently no support for PCIe on mainline.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
|
|
Fails the probe with ENODEV when the REFCLK is missing and the PCIe PLL
cannot be locked. Without this change the driver just hang during
probe, completing freezing the system.
Upstream-Status: Pending
This is required to solve a specific issue we have on Colibri-iMX8X,
in which we have the PCIe node enabled for non Wi-Fi variant
and the PCIe REFCLK generator is not assembled.
Upstream driver does not support i.MX8QXP at the moment,
therefore there is nothing we can upstream.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
|
|
Remove not existent property from mipi_dsi_host nodes
Upstream-Status: Pending
No support in upstream linux
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
|
|
Add hdmi_connector and all relevant configurations.
Move pinctrl, ddc-i2c-bus and hdp-gpio from lt8912_hdmi
to hdmi_connector.
Correct lt8912_hdmi compatible and fix its ports configuration.
Upstream-Status: Pending
No support in upstream linux
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
|
|
This reverts commit 1d3d34c377dc78e18c483e7c748964a8750c6ec4.
This series broke our 10" capacitive LVDS panel. Revert until fixed.
Upstream-Status: Inappropriate [not upstream]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
This reverts commit 6733dd9e5c95fef0a74cd35154fa385cf32745d2.
This series broke our 10" capacitive LVDS panel. Revert until fixed.
Upstream-Status: Inappropriate [revert of backport]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
This reverts commit f57690a9374745357c290b56e6007a7820f11461.
This series broke our 10" capacitive LVDS panel. Revert until fixed.
Upstream-Status: Inappropriate [revert of backport]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
This reverts commit 164ceca07ae13052a9db49125d4b42f0c1413671.
This series broke our 10" capacitive LVDS panel. Revert until fixed.
Upstream-Status: Inappropriate [revert of backport]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
This reverts commit e435f17a00caf52cc3f0154367308888c4e7d676.
This series broke our 10" capacitive LVDS panel. Revert until fixed.
Upstream-Status: Inappropriate [revert of backport]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
This reverts commit 963141684eb2bd5166096f03865696e341598bb1.
This series broke our 10" capacitive LVDS panel. Revert until fixed.
Upstream-Status: Inappropriate [revert of backport]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
This reverts commit 90722e5666993df76bb203e0ad60b42cd4111781.
This series broke our 10" capacitive LVDS panel. Revert until fixed.
Upstream-Status: Inappropriate [revert of backport]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
This reverts commit e3b41fa9c03182c51c93f54dfd2f31c87aec8a49.
This series broke our 10" capacitive LVDS panel. Revert until fixed.
Upstream-Status: Inappropriate [revert of backport]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
This reverts commit fd34ae5146f2df6d4f9f2a0046b697ff6b5a267e.
This series broke our 10" capacitive LVDS panel. Revert until fixed.
Upstream-Status: Inappropriate [revert of backport]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
This commit adds VPU to colibri-imx8x.
Upstream-Status: Pending
- This can and should be upstreamed
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
|
|
Bring back CMA in device tree and set its size to 384MiB for all
Colibri iMX8X.
Upstream-Status: Pending
- This can and should be upstreamed.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
|
|
Remove reserved memory for the GPU. This is application specific and
our Qt-Demo still works without this reserved memory.
Upstream-Status: Pending
- No GPU support as of yet in mainline
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
|
|
Returns EPROBE_DEFER when of_drm_find_bridge() fails, this is consistent
with what all the other DRM bridge drivers are doing and this is
required since the bridge might not be there when the driver is probed
and this should not be a fatal failure.
Cc: <stable@vger.kernel.org>
Fixes: 30e2ae943c26 ("drm/bridge: Introduce LT8912B DSI to HDMI bridge")
Upstream-Status: Submitted [https://lore.kernel.org/all/20230322143821.109744-1-francesco@dolcini.it/]
Signed-off-by: Matheus Castello <matheus.castello@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230322143821.109744-1-francesco@dolcini.it
|
|
This reverts commit e23c36833d51923ea2f2ad9730a9ea54a9a54e6f.
Revert the PCIe/Wi-Fi addition, this fixes a boot regression on
non-WiFi modules.
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
|
|
The reset GPIO logic of the Atmel maxtouch driver was changed to be
active low. Adjust the configuration so that the touchscreen is in an
usable state.
Fixes: ccd928d47f593 ("arm64: dts: colibri-imx8x: Add atmel mxt touch")
Upstream-Status: Pending
Needs to be upstreamed
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
|
|
Add support for Wi-Fi that is connected to the SoC with PCIe. Make sure
the clock is enabled with a GPIO Hog. Do also make sure the GPIO for
power-down is high (power enabled).
Upstream-Status: Pending
- There is currently no support for PCIe on mainline.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
|
|
According to the PCIe standard the PERST# signal (reset-gpio in
fsl,imx* compatible dts) should be kept asserted for at least 100 usec
before the PCIe refclock is stable, should be kept asserted for at
least 100 msec after the power rails are stable and the host should wait
at least 100 msec after it is de-asserted before accessing the
configuration space of any attached device.
From PCIe CEM r2.0, sec 2.6.2
T-PVPERL: Power stable to PERST# inactive - 100 msec
T-PERST-CLK: REFCLK stable before PERST# inactive - 100 usec.
From PCIe r5.0, sec 6.6.1
With a Downstream Port that does not support Link speeds greater than
5.0 GT/s, software must wait a minimum of 100 ms before sending a
Configuration Request to the device immediately below that Port.
Failure to do so could prevent PCIe devices to be working correctly,
and this was experienced with real devices.
Move reset assert to imx6_pcie_assert_core_reset(), this way we ensure
that PERST# is asserted before enabling any clock, move de-assert to the
end of imx6_pcie_deassert_core_reset() after the clock is enabled and
deemed stable and add a new delay of 100 msec just afterward.
Link: https://lore.kernel.org/all/20220211152550.286821-1-francesco.dolcini@toradex.com
Link: https://lore.kernel.org/r/20220404081509.94356-1-francesco.dolcini@toradex.com
Fixes: bb38919ec56e ("PCI: imx6: Add support for i.MX6 PCIe controller")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Richard Zhu <hongxing.zhu@nxp.com>
Upstream-Status: Backport
- This patch is already backported to stable linux 5.15.y but was
overwritten by NXP patches. Do backport it again from upstream commit
a6809941c1f17f455db2cf4ca19c6d8c8746ec25
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
|
|
Remove wrong mode-fixup on the LDB driver that limited the pixel clocks
to 74.25MHz in single channel mode and 148.5MHz in dual channel mode.
According to the iMX8MP Reference manual, the LDB peripheral supports:
"
- Single channel (4 lanes) output at up to 80MHz pixel clock and LVDS clock.
This supports resolutions up to 1366x768p60.
- Dual asynchronous channels (8 data, 2 clocks). This is intended for a single
panel with two interfaces, transferring across two channels (even pixel/odd
pixel). This is supported at up to 160MHz pixel clock, which is up to 80MHz
LVDS clock (due to 2 pixels per LVDS clock). This supports resolutions
above 1366x768p60, up to 1080p60.
"
We contacted NXP trying to find the real reason for this seemingly
random limitation, but we didn't get any response.
The forced pixel clock values were removed and now it's possible to
drive LVDS displays that have pixel clock requirements out of the previously
limited range, but that are still within the hardware limitations.
A check was added to ensure that clocks out of range are denied.
With this change, it is now possible to use this display:
- LVDS display (CMT1210A07R00 800x600 - 40MHz pixel clock)
Also, the Toradex 10" Capacitive touch display (68.93MHz pixel clock)
continues to work.
Upstream-Status: Pending
The file where this change was applied doesn't exist upstream.
Signed-off-by: Rafael Beims <rafael.beims@toradex.com>
|