summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2012-02-23arm: tegra: power: Add AP33 Battery EDP tabletegra-l4t-r15-alphaPeter Boonstoppel
Exact copy of AP30 table Bug 926056 Change-Id: I48730c41605b177d267a569804bbc75a6b94cfba Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com> Reviewed-on: http://git-master/r/85233 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
2012-02-23ARM: tegra: Do not unlock CoreSight register accessScott Williams
There is no reason to unlock APB CoreSight register access in the kernel. The debugger can perform it's own unlock operation as needed. Keep the registers write-protected to prevent inadvertent access. Change-Id: I22f28f76b5dd498b3782ab3380a04f865b59d6fd Signed-off-by: Scott Williams <scwilliams@nvidia.com> Reviewed-on: http://git-master/r/85039 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
2012-02-23ARM: tegra: cardhu: set dap1 drive strengthNikesh Oswal
Change-Id: I1b3797b021adadd1ad944ede45b5916500a881e6 Signed-off-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-on: http://git-master/r/84542 Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-02-23ARM: tegra: power: Power off multiple CPUs on-lineAlex Frid
Currently on Tegra3 cpu complex is powered off in idle (enters CPU0 LP2 state) only if all secondary CPUs are off-line. This commit adds an option for CPU0 to enter LP2 while secondary CPUs are still on-line but have been power gated and entered LP2 state by themselves. The critical race: secondary CPU is waking up from LP2, while CPU0 is turning common CPU rail off, is addressed as follows. 1. When entering LP2 state on CPU0: a) disable GIC distributor b) check that CPU1-3 are all power-gated (i.e., either off-lined or have entered LP2) c) if (b) passes - set all interrupts affinity to CPU0, then re-enable distributor and continue with CPU complex powering off d) if (b) fails - re-enable distributor and enter clock-gated (LP3) state on CPU0 This procedure prevents waking secondary CPUs by GIC SPIs. 2. We still need to make sure that no CPU1-3 PPIs from legacy IRQ/FIQ or private timers would happen. This is achieved by disabling timers and legacy interrupts if CPU1-3 enters LP2 state with external timers selected as wake sources. Respectively, establish dependency between turning rail off and LP2 wake timers configuration options. 3. Finally, no IPIs is sent by CPU0 entering LP2. There are no special changes in wake up procedures - whenever CPU0 is awaken by external interrupt or wake timer, cpu complex is powered on by h/w, and secondary CPUs that were in LP2 state are ungated by the same interrupt (off-line CPUs are kept power gated). Hence, there is no need for CPU1-3 external wake timers to run while the rail is off, and these timers are stopped. To make sure that none of secondary CPUs over-sleeps its LP2 time, CPU0 wake timer is set to minimum sleep interval of all CPUs. By default configuration option for powering off multiple on-line CPUs is disabled on Tegra3. Change-Id: I4920d0df375536b2b8ebd9e6738c5fe4f92b92a0 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/83547 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-02-23video: tegra: dc: in continuous mode mask VBLANK after first frameNitin Kumbhar
A V_BLANK interrupt for each frame does not allow long lp2 idle intervals. If all windows are clean, mask V_BLANK interrupt after processing it for updating smart dimmer. It's unmasked again when a new window update is performed. This will schedule a work for updating smart dimmer for the new frame. Bug 920110 Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com> Reviewed-on: http://git-master/r/85137 (cherry picked from commit 68398090aee22cf02069e5767c3e9a062b0fc2f6) Change-Id: I588328bfd0d6036febed236dc07f441878aa81d1 Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com> Reviewed-on: http://git-master/r/85166 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com>
2012-02-23Revert "mmc: tegra: enabling MMC_PM_KEEP_POWER flag for built_in devices"Om Prakash Singh
This reverts commit caa6566d4fb8539d09276c1bcb818444af675624. MMC_PM_KEEP_POWER should be used only for sdio as power-on/off code is implemented only for sdio. This may also create regression in power. Bug 938011 Bug 943131 Change-Id: I41a29acb3dd6f3396c97ab78f9704f9b39359675 Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-on: http://git-master/r/85213 Reviewed-by: Om Prakash Singh <omp@nvidia.com> Tested-by: Om Prakash Singh <omp@nvidia.com>
2012-02-23spi: tegra: Add Dma/cpu buffer synchronisationLaxman Dewangan
When dma coherant buffer need to be access by cpu or apb dma, it is require to calling the dma_sync_single_for_cpu() when cpu wants to access it and dma_sync_single_for_device() when dma wants to access the buffer. Change-Id: I62fc7fced782f3fc2d145c0d5416a4c8cbe30715 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/85138 Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
2012-02-23serial: tegra: checkpatch cleanupsLaxman Dewangan
Fixing build warning. Cleaning up check patch error and warning. Re-arranging function to avoid prototype definition of static functions. Change-Id: I034f0ca5a1cc2d4c05a79df9df553b87b47d64e2 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/85092 Reviewed-by: Pradeep Goudagunta <pgoudagunta@nvidia.com> Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
2012-02-23asoc: tegra: aic326x machine: configure codec as master for voice callNikesh Oswal
Change-Id: I970ab858399113e4ea0d079779a2cb368af90850 Signed-off-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-on: http://git-master/r/84539 Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-02-23asoc: codecs: aic326x: configure ASI2 as masterNikesh Oswal
configure ASI2 as master and add missing dapm widgets and routes Change-Id: If2f9c8361888ec40147cd5537f435c91e50cbcc8 Signed-off-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-on: http://git-master/r/84538 Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-02-23asoc: codecs: aic326x: add process flow for voice callNikesh Oswal
Change-Id: Ie8ef49b2a76e27e07835fb61bce23ddf69c0b1f9 Signed-off-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-on: http://git-master/r/84537 Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-02-23asoc: tegra: aic326x machine: register the sw dev before the cardNikesh Oswal
If sw dev is registered after the card then there would be a kernel panic if we try to boot the device with Headset connected because when the card is registered init of every dai link is called from where we register the jack with codec driver and doing so will enable headset interrupts which would try to set switch state for an unregistered switch device Change-Id: Ie951f41028a3459e4e13d021c80c3f830bbcc533 Signed-off-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-on: http://git-master/r/84536 Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-02-23asoc: codecs: aic326x: enable the headset interrupts after jack registrationNikesh Oswal
Change-Id: I682ccc9ba44f82b8acf836c1703d5d54419da54b Signed-off-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-on: http://git-master/r/84535 Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-02-23asoc: codecs: aic326x: change the init values of aic326x registersNikesh Oswal
change the init values of aic326x registers to keep unrequired codec elements powered off to save power, these codec elements would be turned on when required by dapm Change-Id: Id843fae2ca1f30b77c402da7ac24e89fb04828b6 Signed-off-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-on: http://git-master/r/84534 Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-02-23asoc: tegra: aic326x: turn the mic bias on for headset detctionNikesh Oswal
Change-Id: I3d2bb9de12f72fe7c860bdfe740a2d55676a8aa3 Signed-off-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-on: http://git-master/r/84533 Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-02-23asoc: codecs: aic326x: add mixer controls for configuring CM modesNikesh Oswal
add mixer controls for configuring CM modes and use the non-inverting modes for speaker and receiver mixers Change-Id: I247ccea17d08dc92ac035d6e8070fb146d26b7f5 Signed-off-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-on: http://git-master/r/84532 Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-02-23asoc: tegra: aic326x: add dapm route for capture pathNikesh Oswal
Change-Id: I433c35f2ada14f273f85d67f8cf18612bd1e72ea Signed-off-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-on: http://git-master/r/84531 Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-02-23asoc: tegra: aic326x: add support for voice call and bt voice callNikesh Oswal
Change-Id: I773a7c6769ca74d1a02e2d0b8236fdc20af3ecb8 Signed-off-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-on: http://git-master/r/84530 Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-02-23asoc: tegra: aic326x: support bt sco playback and recordingNikesh Oswal
support bt sco playback and recording with bt chip as master and ap-i2s as slave Change-Id: I0e1bcd6fa71a234a90c830195a7eb2015f71a3b0 Signed-off-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-on: http://git-master/r/84529 Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-02-23sound: soc: codecs: update the TI codec driver for K39Nikesh Oswal
Change-Id: If40c181227981696961d3c563008261e5324e807 Signed-off-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-on: http://git-master/r/84528 Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-02-23asoc: tegra: enable playback for TI aic326x codecNikesh Oswal
Change-Id: I39fc88a2647556b261767fa8ec990282ceb65103 Signed-off-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-on: http://git-master/r/84527 Reviewed-by: Scott Peterson <speterson@nvidia.com>
2012-02-23mach tegra: give a device name for TI aic326x codec that matches its driverNikesh Oswal
Change-Id: I02bd96569bb5fec8f9b81a4841b0d4ab44d9f836 Signed-off-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-on: http://git-master/r/84526 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com>
2012-02-23tegra-defconfig: enable compilation of TI aic326x codecNikesh Oswal
Change-Id: I3a5731385dba5203ab47071b537708861b4bd928 Signed-off-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-on: http://git-master/r/84525 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com>
2012-02-23video: tegra: host: Fix irq race in system resumeTerje Bergstrom
At system resume, host1x sync point values are restored from memory, and interrupts are enabled. This is done in reverse order, and in cases it might be that interrupt is triggered while sync point values are still being restored. Bug 940381 Change-Id: I0191b84b41306e0f0ba0758d41e5632dcf9d06cd Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/83995 Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
2012-02-23net: wireless: bcmdhd: set reference to physical deviceMursalin Akon
Set the parent field of the netdevice, which causes sysfs to create a device subdirectory under the netdevice. Without this subdirectory the user-space NetworkManager cannot manage the network device. Implemented using void * to maintain current driver implementation of segregated OS-specific implementation. This CL contains changes similar to http://git-master/r/77889 which was done for bcm4329. Bug 924521 (cherry picked from commit 8ce30af25321844cb0e89a3c23f0a6521885b6db) Signed-off-by: Mursalin Akon <makon@nvidia.com> Change-Id: I78ef9883ae1f85dbd3ad18e0ee2dece1559c4da8 Reviewed-on: http://git-master/r/82875 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Allen Martin <amartin@nvidia.com>
2012-02-22mfd: Add itps65910 wakeup supportLaxman Dewangan
Implementing irq_set_wake() so that device should able to wakeup the system through different interrupt provided by this device like gpios, onkey, rtc etc. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com> cherry picked from mainline commit 4f5148777f15413a16a5a8751c959828a7fc001c Change-Id: I894d2e0584f3439a0f7ca7a083337f64bede52b6 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/85126
2012-02-22mfd: Initialize tps65910 irq platform data properlyLaxman Dewangan
irq_base of the tps65910 irq platform data should be initialized with the board provided irq_base data. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com> cherry picked from mainline commit e2aaed2403078ce919d9cf8091ec0ece8e3f12ad Change-Id: I9861b612feb85d9b53095d221f09e3059b3b1371 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/85125
2012-02-22regulator: Fix module desciption for tps65910 regulatorAxel Lin
Fix the module desciption and also update Kconfig to include supporting tps65911 chip. Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> cherry picked from mainline commit 02c38f3e8e9b0cd76bdb835b0fd8d627ddf5e19b Change-Id: Iee8eaf208ae2d448f4c022b2c3908f8519191180 Reviewed-on: http://git-master/r/85124 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-02-22regulator: tps65910: Correct VIO voltage configurationLaxman Dewangan
The VIO regulator register specify the voltage configuration on bit3:2 of its register. And hence only these bits should be modified when setting voltage and used when reading voltage from register setting. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> cherry picked from mainline commit 83e0323211e33b117ce585bab64636ca1fff807a Change-Id: Ica9d50dd62ccab15a02c8769e8b1279fb32d4a03 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/85122
2012-02-22video: tegra: host: Change sync queue to a listTerje Bergstrom
Sync queue is the list of jobs still in flight. As context priorities requires possibility to insert a job in the middle of the queue, the structure needs to be changed into a linked list. Bug 926690 Change-Id: Id257a11f18476c70dd69e36ba44ed2d380c80040 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/83127
2012-02-22usb: gadget: fsl_udc: avoid can_pullup function in vbus_sessionPreetham Chandru
avoid making a call to can_pullup function in vbus_session for non-android gadget drivers. The mass storage gadget driver assumes that the UDCs start with data pullup connected and the mass storage gadget driver do not make an explicit call to usb_gadget_connect. Signed-off-by: Preetham Chandru R <pchandru@nvidia.com> Bug 922561 Change-Id: Ifad305db861caf27b1d9c8e541c2480bb1536b6b Reviewed-on: http://git-master/r/80076 Reviewed-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2012-02-22i2c: tegra: clock control for fast clockLaxman Dewangan
I2c controller requires the clock for fast clock as a second clock source. This clock should be on during normal function of i2c controller. Making sure that i2c driver get this clock and hold the clock enable during data transfer. bug 933653 Change-Id: I676eee1f8a0e1dff81b17259abcd9644bcb0b394 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/78996 Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
2012-02-22mfd: max8907c: intialize pm_power_offBharat Nihalani
Initialize pm_power_off based on use_power_off passed as platform data. Bug 943129 Change-Id: I0a158d226a046809a6d62cf8d9881152cfc2ab83 Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-on: http://git-master/r/84946 Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
2012-02-22ARM: tegra: whistler: HDMI audio while screen is blankBharat Nihalani
continue to play HDMI audio past earlysuspend (when internal screen is powered down). this is accomplished by using FB_BLANK_NORMAL on HDMI display in earlysuspend instead of FB_BLANK_POWERDOWN. Bug 934699 Original change done for other boards by Jon Mayo <jmayo@nvidia.com> Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-on: http://git-master/r/83104 (cherry picked from commit 00f2c63b39c4b41dc07c0fb3d9b2bfde81e84936) Change-Id: Ia773235a4e5e57d3caa17f78a51df3c2be7e6d9d Reviewed-on: http://git-master/r/84889 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-02-22ARM: tegra: Reduce ARCH_NR_GPIOS to 512Dan Willemsen
We don't need 1024 gpios for our current platforms. Change-Id: Id0e27f56697b76c681315ef0701b1baca67ce52b Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com> Reviewed-on: http://git-master/r/83498 Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-02-21mmc: host: Do not enable preset value by defaultPavan Kunapuli
In case of non standard clock, preset value should not be enabled from sdhci driver as it would make clock divider programming in- effective. Bug 937318 Change-Id: I5eaeab538a4978dd8c03501c3dcba2e8a92eea59 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/84807 Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-02-21video: tegra: host: incr_syncpt should not modify maxTerje Bergstrom
When user space calls NvRmChannelSyncPointIncr(), the maximum value of sync point should not be incremented unless sync point is client managed. Also prevents kernel panic if user space tries to increment beyond maximum. Instead, give debug spew and ignore. Bug 936097 Change-Id: I4dc7ed46b1e0394d41066051a47f1d7a1f08493c Reviewed-on: http://git-master/r/79957 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2012-02-21arm: tegra: config: Update Tegra defconfigGaurav Sarode
Change-Id: I93e6380f3c9f838ecbe29de5ad9d14bab442d7d3 Signed-off-by: Gaurav Sarode <gsarode@nvidia.com> Reviewed-on: http://git-master/r/84797 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-02-21ARM: tegra: clock: Support for clock source control without enable bitLaxman Dewangan
Some of controller like i2c requires a different clock source which is not enabled/disabled by the clock bit in CAR register set. Handling such cases by looking for PERIPH_NO_ENB flag when calling clock enable/disable functions. Change-Id: Id0d1df7946d1c83d769116ae7a91546bd59d4478 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/84709 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-02-21i2c: tegra: Add connection name in clk_get_sysLaxman Dewangan
Adding the connection name of clock as "i2c-div" when i2c driver calls clk_get_sys() for getting clock data pointers. Change-Id: I3e7fa79ce6d51be189f1d93cb54af0d1b3425de8 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/84694 Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
2012-02-21ARM: tegra: clock: Add i2c fast clock entryLaxman Dewangan
Adding i2c fast clock entry which is derived from pllp_out3. This is non-muxed input clock for i2c and does not have any enable bit on CAR register set to enable/disable through clock-reset registers. bug 933653 Change-Id: I0c50d6570b88510e3acef2ed0993e4305b2e34e8 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/84693 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-02-21cpufreq interactive governor: Unify attribute store functionsPeter Boonstoppel
Change our added attributes' store functions to Google style Change-Id: I5dc641112085698918e87b52378fe3a5bfe44360 Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com> Reviewed-on: http://git-master/r/84452 Reviewed-by: Satya Popuri <spopuri@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
2012-02-21video: tegra: dc: use side-by-side stereo HDMI modeAndrija Bosnjakovic
Add a config option to limit HDMI stereo 3D output to 74.25MHz pixel clock. When this option is set, substitute the frame pack stereo modes for side-by-side (half) left-right stereo modes to meet this pixel clock restriction. By default, do not use it (use frame packed HDMI mode as usual). Bug 938807 Change-Id: I2ce2ca72cbb15ac1939af0f3386dd23650262435 Reviewed-on: http://git-master/r/84252 Reviewed-by: Andrija Bosnjakovic <abosnjakovic@nvidia.com> Tested-by: Andrija Bosnjakovic <abosnjakovic@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2012-02-21usb: cdc-acm: Fix compilation warning in cdc-acm driver.Steve Lin
Bug 934177 Change-Id: If101278cf553bd92ad98a9485cedf0c3bf1df39a Signed-off-by: Steve Lin <stlin@nvidia.com> Reviewed-on: http://git-master/r/83913
2012-02-18hwmon: adt7461: Remove usage of irq_to_gpioDan Willemsen
This API is being removed in v3.2 Change-Id: I3d864dabd2273e737604776aa43c45a64eae90b3 Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com> Reviewed-on: http://git-master/r/83561 Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-02-18staging:iio:magnetometer:ak8975: Fix probe() error-handlingStephen Warren
Fix ak8975_probe() to jump to the appropriate exit labels when an error occurs. With the previous code, some cleanup actions were being skipped for some error conditions. Upstream v3.2 commit ad31d250bf60c8e4c990e8b0daeedbaa2d6884a9 Change-Id: Ib0ef38f154fbcf18604ad283f51f040b5e038c65 Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Andrew Chew <achew@nvidia.com> Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com> Reviewed-on: http://git-master/r/83532 Reviewed-by: Andrew Chew <achew@nvidia.com> Reviewed-by: Allen Martin <amartin@nvidia.com>
2012-02-18staging:iio:magnetometer:ak8975: Don't assume 0 is an invalid GPIOStephen Warren
gpio_is_valid() is the defined mechanism to determine whether a GPIO is valid. Use this instead of assuming that 0 is an invalid GPIO. Upstream v3.2 commit 7c6c936832a46e86b0fac654923ce5015bdc80ee Change-Id: Ica81b9fa8379db07ca7d23a6c43c6ab742ef09b6 Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Andrew Chew <achew@nvidia.com> Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com> Reviewed-on: http://git-master/r/83531 Reviewed-by: Andrew Chew <achew@nvidia.com> Reviewed-by: Allen Martin <amartin@nvidia.com>
2012-02-18staging:iio:magnetometer:ak8975 use platform_data to pass the gpio number.Jonathan Cameron
Tegra doesn't have irq_to_gpio() any more, and ak8975 is included in tegra_defconfig. This causes a build failure. Instead, pass the GPIO name through platform data. [swarren: Rewrote commit description when I squashed this with my patch to remove the irq_to_gpio() call] Upstream v3.2 commit f6d838d7fecfd4e59a4ce7bdfb16165add36d26e Change-Id: I6bd269aa8c0ff8165078ff67e4cbcfdde936c20d Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com> Reviewed-on: http://git-master/r/83530 Reviewed-by: Andrew Chew <achew@nvidia.com> Reviewed-by: Allen Martin <amartin@nvidia.com>
2012-02-18arm: tegra: Kai: Touch setupAli Ekici
Modified touch setup and init calls, so that Raydium DirectTouch can support both Kai and Cardhu. Bug 832605 Signed-off-by: Ali Ekici <aekici@nvidia.com> Change-Id: I13f57129b17e96b0f198b5d87a249008b2b3b4cb Reviewed-on: http://git-master/r/80127 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com> (cherry picked from commit 659e18eb209d0d93025ff6ea07e91f7e27a762e1) Reviewed-on: http://git-master/r/83570 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-02-18arm: tegra: Raydium DirectTouch Board fileAli Ekici
Modified files supports unified DirectTouch that can work both for Cardhu and Kai. Touch configuration is passed to driver with these board files. Bug 832605 Signed-off-by: Ali Ekici <aekici@nvidia.com> Change-Id: I075aaad2e71ee1a87b23680ef629fc99bc42ea93 Reviewed-on: http://git-master/r/80129 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com> (cherry picked from commit dc1372f43159640207a0d4e0ff08dde5bafc1baa) Reviewed-on: http://git-master/r/83569 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-20 04:34:41 +0000