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2011-08-24ARM: tegra: dvfs: Update Tegra3 CPU dvfs tablestegra-12r7-android-3.2tegra-12r7-android-2.3Alex Frid
Bug 817679 Reviewed-on: http://git-master/r/#change,48823 (cherry picked from commit ee7c1eee1b5e896eca34bd3604642f5ccd06e3b1) Change-Id: I73a88a0fbdb2cec276082a20894f5d0633f70a50 Reviewed-on: http://git-master/r/49107 Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
2011-08-24arm: tegra: enterprise: secureos LP2 suspend modeJ. Aaron Gamble
For secureos builds, disables LP0 on enterprise, enables LP2 Change-Id: Iffea0ed8a229604f76f33cc58ea287e7f01dea26 Reviewed-on: http://git-master/r/48843 Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
2011-08-24ARM:tegra:board-cardhu:Control for governorBhushan Rayrikar
Add control to allow setting governor from tegra_camera Bug 853164 Change-Id: I02dcc9a33b7c1424bfb656d5ddf52aee93481290 Reviewed-on: http://git-master/r/48277 Reviewed-by: Bhushan Rayrikar <brayrikar@nvidia.com> Tested-by: Bhushan Rayrikar <brayrikar@nvidia.com> Reviewed-by: Jihoon Bang <jbang@nvidia.com> Tested-by: Jihoon Bang <jbang@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
2011-08-24media: video: tegra: Control for governorBhushan Rayrikar
Add control for setting governor from tegra_camera Bug 853164 Change-Id: I82b83226b406f2f85a227fdc72a3ed7b32192c35 Reviewed-on: http://git-master/r/48275 Reviewed-by: Jihoon Bang <jbang@nvidia.com> Tested-by: Jihoon Bang <jbang@nvidia.com> Reviewed-by: Bhushan Rayrikar <brayrikar@nvidia.com> Tested-by: Bhushan Rayrikar <brayrikar@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
2011-08-24ARM: tegra: common: Control for governorBhushan Rayrikar
Add control for setting governor from tegra_camera. Also, add a lock for saving/setting governor. Bug 853164 Change-Id: I8041e0757d68273779b3cbe822aa96e52d3d571c Reviewed-on: http://git-master/r/48274 Reviewed-by: Jihoon Bang <jbang@nvidia.com> Tested-by: Jihoon Bang <jbang@nvidia.com> Reviewed-by: Bhushan Rayrikar <brayrikar@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
2011-08-24ARM: tegra: correctly access file in kernelVictor(Weiguo) Pan
1. Tell the kernel the pointers from within the kernel address space are safe before accessing the file. Save/restore current process address before/after the file accessing. 2. Use macro IS_ERR to check file opening is successful or not because filp_open() returns negtive value once error happens. bug 865113 Change-Id: Idbcd400a7c93576930651a0cf95e6928e1f8db3a Reviewed-on: http://git-master/r/48788 Reviewed-by: Bhushan Rayrikar <brayrikar@nvidia.com> Tested-by: Bhushan Rayrikar <brayrikar@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
2011-08-24video: tegra: dc: Fix smartdimmer brightness update issue.Krishna Reddy
When dc is disabled, don't perform smartdimmer brightness update. Accessing dc registers when dc is disabled causes cpu lockup. Bug 866024 Change-Id: I0f18f1112cb3575a3d155a5dc4120da5696f1285 Reviewed-on: http://git-master/r/49065 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Tested-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
2011-08-24video: tegra: fb: do not set mode on registerJon Mayo
Do not load a default mode on fb register. This causes a race with any userspace attempts to set a mode on hotplug. Bug 862473 Change-Id: I0011d50d9e3c555fcbcc32f1be30e1ba13919442 Reviewed-on: http://git-master/r/49022 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Tested-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
2011-08-24ARM: tegra: board-enterprise: Control for governorBhushan Rayrikar
Add control to allow setting governor from tegra_camera Bug 853164 Change-Id: I89c723ebe8be5ad907214c18e4084f03e26171bf Reviewed-on: http://git-master/r/48339 Tested-by: Bhushan Rayrikar <brayrikar@nvidia.com> Reviewed-by: Jihoon Bang <jbang@nvidia.com> Tested-by: Jihoon Bang <jbang@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
2011-08-24ARM: tegra: cardhu: Button mapping for GB and HCAnshul Jain
Reverts change Ib576789abbc697811836bc1ad06a8094dc24f6f6 which broke the button mapping on GB Bug: 866530 Change-Id: I8731707276dcf72890996935a1f9cbf89ecab0ba Reviewed-on: http://git-master/r/48863 Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com> Reviewed-by: Anshul Jain (SW) <anshulj@nvidia.com> Tested-by: Anshul Jain (SW) <anshulj@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
2011-08-24power: bq27x00: add lock for battery_status_changed flagPritesh Raithatha
-Add lock for battery_status_changed flag. -Correct more appropriate fast poll period and max count. Bug 866179 Original author: Pritesh Raithatha Original change: http://git-master/r/#change,48740 Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> Change-Id: I1283454e8dd9172ebcaa08542062863fa7b6ee50 Reviewed-on: http://git-master/r/48772 Tested-by: Daniel Solomon <daniels@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
2011-08-24power: bq27x00: correct i2c function callsPritesh Raithatha
For i2c transfer existing code using mix of i2c_smbus_read_word_data and i2c_transfer. As they both are not serialized, they both are independently accessing i2c bus. In a situation like power plug connect/disconnect while device in suspended state, they both are called parallelly and we are getting garbage data. Using only one function i2c_smbus_read_word_data at all place solves the issue. Bug 866179 Original author: Pritesh Raithatha Original change: http://git-master/r/#change,48739 Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> Change-Id: Ib5c4377742da3703d97cbbac234fb2fbf1f70999 Reviewed-on: http://git-master/r/48771 Tested-by: Daniel Solomon <daniels@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
2011-08-24arm: tegra: usb_phy: Enable 2LS bit time for usb2Rakesh Bodla
Make sure SE0 is driven for 2LS bit time end of resume, so that host does not see any false disconnect. This done only on usb instance 2. Bug 860693 Original Author: Rakesh Bodla Reviewed-on: http://git-master/r/48230 (cherry picked from commit c65da316c891f8181f6cccab798652397dab0ef3) Change-Id: I62dbd6c6e772fe396f6713b20317c183f51d5df6 Reviewed-on: http://git-master/r/48762 Tested-by: Daniel Solomon <daniels@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
2011-08-22arm: tegra: nvhost: remove priv timeout DO NOT MERGELuke Huang
Change-Id: Ib65fc62b655e8e5823c8dc064ae9b8ade15f7d2e Reviewed-on: http://git-master/r/48622 Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com> Tested-by: Chih-Lung Huang <lhuang@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
2011-08-22arm: tegra: cardhu: secureos LP2 suspend modeJ. Aaron Gamble
FOR 12r7 ONLY Temporary change from LP0 to LP2 for secureos customers Change-Id: I076fd59e92ab64e9d9c958bc991e2fc3e13de108 Reviewed-on: http://git-master/r/48583 Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
2011-08-22Revert "media: video: tegra: sh532u: remove focuser init_pos"Qinggang Zhou
This reverts commit 713b0fe85ab640016918062fed8b62486f88f92e. bug 866141 Change-Id: I5c1c9c78fc6a7078d20d0e5e5e2103e78e9211cc Reviewed-on: http://git-master/r/48618 Reviewed-by: Qinggang Zhou <qzhou@nvidia.com> Tested-by: Qinggang Zhou <qzhou@nvidia.com> Reviewed-by: Patrick Shehane <pshehane@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
2011-08-22ARM: tegra: cardhu: Right button mapping for power and volumeAnshul Jain
Fixed mapping for volume up and volume down buttons. Bug: 866530 Change-Id: Ib576789abbc697811836bc1ad06a8094dc24f6f6 Reviewed-on: http://git-master/r/48608 Tested-by: Ryan Wong <ryanw@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com>
2011-08-22Revert "ARM: tegra: cardhu: Right button mapping for power and volumeLuke Huang
DO NOT MERGE" This reverts commit 19a2756e08ace957e4e9139117408d99290f1da3. Change-Id: Iab4a18cde66282b9aaaf77d6b33c1cddb0611aca Reviewed-on: http://git-master/r/48614 Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
2011-08-22arm: tegra: patch for lp0Luke Huang
Add delay after switching the clock source for sclk Change-Id: Iaca062fe4d400ace942f9d586b86e2b9e88c0ce7 Reviewed-on: http://git-master/r/48603 Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
2011-08-22ARM: tegra: cardhu: Right button mapping for power and volume DO NOT MERGEAnshul Jain
Fixed mapping for volume up and volume down buttons. Change-Id: Icfb48550bcc27e0120a110a32309be1d054a9321 Reviewed-on: http://git-master/r/48595 Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com> Tested-by: Chih-Lung Huang <lhuang@nvidia.com> Reviewed-by: Anshul Jain (SW) <anshulj@nvidia.com> Tested-by: Anshul Jain (SW) <anshulj@nvidia.com> Reviewed-by: Ryan Wong <ryanw@nvidia.com> Tested-by: Ryan Wong <ryanw@nvidia.com>
2011-08-22video: tegra: nvhost: Context save on suspendGreg Roth
Save context when clock gating. System suspend might happen when unit is clock gated, which requires context to be restored at resume. Bug 857053 Bug 866693 Change-Id: Ic45f17e18447d530f6a680ff14ac5cad13639fdd Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/48401 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-08-22ARM: tegra: power: Remove compiler warningPeter Boonstoppel
Change-Id: Ic4a9571799da93749f571f5fb81a2391c6da50eb Reviewed-on: http://git-master/r/48225 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-08-22ARM: tegra: enterprise: Fix mode check in board config file.Kevin Huang
Change-Id: Ia19646893c7a25a42538a5aafab2a13bd6bbc5dc Reviewed-on: http://git-master/r/48128 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-08-22power: delay early_suspend for 1sXin Xie
bug 857053 Change-Id: I9ae35026009d2a73e253386661902004d99a25c9 Reviewed-on: http://git-master/r/48349 Reviewed-by: Xin Xie <xxie@nvidia.com> Tested-by: Xin Xie <xxie@nvidia.com> Reviewed-by: Daniel Solomon <daniels@nvidia.com> Tested-by: Daniel Solomon <daniels@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-08-22mfd: tps80031: Handle watch dog interrupt properlyLaxman Dewangan
Handling watch dog interrupt properly. bug 841080 Change-Id: I09fe1433005537d3294b16f2959ddd5abf1d8b24 Reviewed-on: http://git-master/r/48364 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
2011-08-22usb: gadget: fsl: proper handling of regulator apisRakesh Bodla
Regulator apis for setting current should not be called from interrupt context. Hence, scheduling a separate work for that. Bug 854993 Change-Id: I7ff75bb2b9b2f8c0c658cf9097e93d3cfe599775 Reviewed-on: http://git-master/r/48331 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
2011-08-22tegra: nvhost: Set minimum rate for nvhost clocksAlex Frid
Define minimum rate level for nvhost clocks that is applied to all user space clients requests. Actually set minimum rate for EMC clock. Bug 859515 Change-Id: I85a7e835bacb11fd794cda6916e397e0f3cbd728 Reviewed-on: http://git-master/r/48325 Tested-by: Yu-Huan Hsu <yhsu@nvidia.com> Tested-by: Daniel Solomon <daniels@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-08-22ARM: Tegra: dvfs: Fix speedo value thresholds for T30S, T30Diwakar Tundlam
Bug 855816 Change-Id: I75b46b3b1b3452cde3c73622fcef5b26fcd1649d Reviewed-on: http://git-master/r/48237 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-08-22ARM: tegra: Enable CONFIG_TEGRA_EDP_EXACT_FREQDiwakar Tundlam
Toggle to using exact EDP table frequencies as default Bug 863761 Change-Id: Idbcbe870ae3266c2e5d5aefad6869632284b052b Reviewed-on: http://git-master/r/47991 Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com> Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com> Tested-by: Peter Boonstoppel <pboonstoppel@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-08-22cpufreq: stats: snap freq to next lower freq when not in tablePeter Boonstoppel
When cpu runs at frequency not in cpufreq table (because of other frequency governing mechanisms), bill time spent at that frequency to next lower frequency in cpufreq stats table. Change-Id: I9cfda4e7a223ca3f773f1adb145d242483209799 Reviewed-on: http://git-master/r/47929 Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com> Tested-by: Peter Boonstoppel <pboonstoppel@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-08-22mfd: fix tps6586x GPIO value settingPreetham Chandru
The tps6586x_gpio_set function is resetting all other GPIO pins. We need to update the right GPIOxOUT bit of the GPIOSET2 register instead of overriding the full value. Also Inverted GPIO and subdevices initialization. When using a fixed voltage regulator, this allows to declare and initialize it conveniently from the "subdev" list. Bug: 829647 Change-Id: I1480c2d1f2bee549ebc81fef264841c9a9e4daaa signed-off-by: Preetham Chandru <pchandru@nvidia.com> Reviewed-on: http://git-master/r/47809 Reviewed-by: Allen R Martin <amartin@nvidia.com>
2011-08-22ARM: tegra: enterprise: Enable DIDIM by default.Kevin Huang
Bug 859226 Change-Id: Iae2960800b60a44e1492539dfa0be4218ac12ba2 Reviewed-on: http://git-master/r/47435 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-08-22input: touch: atmel_mxt_ts: Increase touch perf for SKU-2000.Robert Collins
Increase touchscreen performance for Cardhu SKU-2000 with touch panel air gap gasket changes. Bug 864735 Change-Id: I01137e8d31230cd1d1f5a7d25d82259cc732b1e5 Reviewed-on: http://git-master/r/47197 Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Ali Ekici <aekici@nvidia.com> Tested-by: Ali Ekici <aekici@nvidia.com> Reviewed-by: Jonathan Mccaffrey <jmccaffrey@nvidia.com> Tested-by: Jonathan Mccaffrey <jmccaffrey@nvidia.com>
2011-08-22video: tegra: overlay: Add support in DSI one-shot mode for DIDIMKevin Huang
Bug 849780 Change-Id: I9e704d5d03a253655acd209e6c0815bb6bef3551 Reviewed-on: http://git-master/r/47149 Reviewed-by: Kevin Huang <kevinh@nvidia.com> Tested-by: Kevin Huang <kevinh@nvidia.com> Reviewed-by: Phillip Smith <psmith@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-08-22ARM: Tegra: cpu: Set G-CPU L2 cache latency to 0x777/777Diwakar Tundlam
Bugid 860893 Change-Id: I8c04b6193b19ba847df40cc88bb5c49782817428 Reviewed-on: http://git-master/r/45880 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
2011-08-22ARM: tegra: enterprise: Enable panel reset by default.Kevin Huang
Change-Id: I88e83b7e67851ba64269109a9d83d4c6010481ef Reviewed-on: http://git-master/r/48344 Reviewed-by: Kevin Huang <kevinh@nvidia.com> Tested-by: Kevin Huang <kevinh@nvidia.com> Reviewed-by: Thomas Cherry <tcherry@nvidia.com> Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com> Tested-by: Matt Wagner <mwagner@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-08-22video: tegra: dsi: Reset DSI state during system booting.Kevin Huang
Bug 866389 Change-Id: Ia382270e29fb8b0c111ffe41bcee20f8a072f3a2 Reviewed-on: http://git-master/r/48343 Reviewed-by: Kevin Huang <kevinh@nvidia.com> Tested-by: Kevin Huang <kevinh@nvidia.com> Reviewed-by: Matt Wagner <mwagner@nvidia.com> Reviewed-by: Thomas Cherry <tcherry@nvidia.com> Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com> Tested-by: Matt Wagner <mwagner@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-08-22ARM: harmony: L4T defconfig: turn on CIFS and NTFSMursalin Akon
Turn on CIFS and NTFS as module Change-Id: Id9b6a548b7896dee41061fe192aeef712f9f4aa1 Signed-off-by: Mursalin Akon <makon@nvidia.com> Reviewed-on: http://git-master/r/47873 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2011-08-22tegra: harmony: wifi: add board support for WiFiPreetham Chandru
The SDIO WiFi module requires power from external PMU and 1.2V regulator. The module gets powered on if - (1) all power sources are enabled, and (2) power (down) and reset (down) pins are enabled as per spec. To enable mmc/SDIO driver to detect the WiFi hardware, the WiFi chip has to be powered-up before mmc driver does probing. So, steps should be as following: (1) required regulators are on, (2) power/reset of WiFi are enabled, (3) mmc does probing. Later time, when WiFi driver module is loaded and registers with SDIO, the SDIO driver knows which H/W the driver has to be associated with. Bug: 829647 Change-Id: I55724cf9dfb6bd2b9f9133632b31d6eef072a35f signed-off-by: Preetham Chandru <pchandru@nvidia.com> Reviewed-on: http://git-master/r/47808 Reviewed-by: Allen R Martin <amartin@nvidia.com>
2011-08-22video: tegra: dc: correct rounding of bandwidth for window BMichael Frydrych
Patch eb81b378 had a sideeffect in that bandwidth of window B may have no longer been rounded up to 1MBs, contrary to original intention. This patch fixes it. Change-Id: Idaba2923e0316245e284e19e1a995adf1bd9cd35 Reviewed-on: http://git-master/r/47133 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2011-08-22tegra: defconfig: harmony: Enable Fixed Voltage RegulatorPreetham Chandru
Enabled Fixed Voltage Regulator for harmony Bug: 829647 Change-Id: I0ecf09deabcd4572ba73b4a594a2b0753eee6c6f signed-off-by: Preetham Chandru <pchandru@nvidia.com> Reviewed-on: http://git-master/r/46957 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2011-08-19ARM: tegra: Avoid timer calibration on slave cpu's.Krishna Reddy
Use the value calibrated by master cpu. Bug 843553 Change-Id: I88939f37050873e0633782f6a927ffaf9b8d776d Reviewed-on: http://git-master/r/47988 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-08-19backlight: aat2870: Fix max_current settingJin Park
In the current implementation, if pdata->max_current is not set or AAT2870_CURRENT_0_45, it makes same result. Signed-off-by: Jin Park <jinyoungp@nvidia.com> Change-Id: I8ba17e92b81cd0e5668e583da48eaa56a57a09cf Reviewed-on: http://git-master/r/48138 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-08-19ARM: tegra: enterprise: Change source clock of HDMI.Kevin Huang
Change HDMI clock from pll_d to pll_d2. Bug 864701 Change-Id: I7e780b721a8e53ec331dc67b89e0172a17ad17ea Reviewed-on: http://git-master/r/48060 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-08-19arm: tegra: enterprise: add usb charge regulatorRakesh Bodla
Adding the regulator information needed for usb charging. Bug 854993 Change-Id: Ie2a1d1b91e19a37d6fc437fa9ec933172f682259 Reviewed-on: http://git-master/r/47530 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-08-19tegra: usb: phy: preresume action for HSICSeshendra Gadagottu
Added preresume action for HSIC. This is needed for modem L2 state. BUG 828389 Change-Id: Ifbb9105741f87840d6b607109bc448704600903f Reviewed-on: http://git-master/r/47296 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-08-19usb: ehci: tegra: Post resume action for HSICSeshendra Gadagottu
Added post resume action for HSIC interface. BUG 828389 Change-Id: I94c96e0a53da01283da178a06136a65449f15d91 Reviewed-on: http://git-master/r/46344 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-08-19ARM: tegra: pm: Do not use ioremap for sys memPrashant Gaikwad
ARMv6+ architecture does not allow ioremap on system memory. lp0 is relocated using ioremap on DRAM. If lp0 vector start address is in system memory then use memblock_reserve and do not relocate. Else if it is overlapping with carveout/fb then first remove the carveout/fb using memblock_remove and then use ioremap. Bug 827199 Reviewed-on: http://git-master/r/43685 (cherry picked from commit 1753408edc65ebfc0d4d203f2be960d49ca747a8) Change-Id: Ic4abfbc98b43aafb2756cb3e69d0ee178204ec7d Reviewed-on: http://git-master/r/44717 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-08-19arm: tegra: pm: Relocate lp0 vectorPrashant Gaikwad
LP0 vector is allocated by BL and address is shared to kernel. For platform with memory less than 1GB it was allocated in the overlapping region of carveout memory. Because of it during AVP operation it gets corrupted, which prevents resume. Relocate AVP vector to some other location where overlapping will not occur. Bug 827199 Reviewed-on: http://git-master/r/42113 (cherry picked from commit 9a3993d39599d1637d7c04218e6a634f914e9f91) Change-Id: If862f6ff61a316c478806b7dc3deff70a2861410 Reviewed-on: http://git-master/r/44716 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-08-19regulator: tps8003x: Add Charging bus IDLaxman Dewangan
Adding charging rail ID for registering as regulator. Change-Id: I654f8d040be5387bc8d6949e0338db6d4fdd5ed4 Reviewed-on: http://git-master/r/48208 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-24 06:25:51 +0000