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2011-06-08video: tegra: nvmap: Fix iovm_commit accounting issue.tegra-12r1vdumpa
Bug 835748 Reviewed on http://git-master/r/#change,35792 Change-Id: I2bc8f330df853cf91c661c2a821c6199de43f7f9 Reviewed-on: http://git-master/r/35837 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-06-02ARM: tegra: cardhu: Power button to unlock screentegra-AP30.ER6vikasr
Made changes in the code to include PM269's power button to lock and unlock the screen. Bug 824765 Change-Id: I6cead8cfd2a84ffa6ba5ef654e690f2f675a3c77 Reviewed-on: http://git-master/r/31607 Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com> Tested-by: Vikas Ramesh Kedigehalli <vikasr@nvidia.com>
2011-06-02ARM: tegra: display: pm269: Support for lvdsPradeep Goudagunta
Added support to boot with LVDS display by default on pm269 board. Bug 823160 Change-Id: I8013bc011328d4724f499af47aa1b118811cc3ec Reviewed-on: http://git-master/r/30374 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-06-02arm: tegra: enterprise: use max98088 codecTom Cherry
Change-Id: Ib3d384932938c8c9204cbf30d5aa869ec619dfad Reviewed-on: http://git-master/r/34240 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-06-02arm: tegra: add tegra_i2s_device0Tom Cherry
Change-Id: I788d41d7c9880e29031d50b3d8829953cbc38f4f Reviewed-on: http://git-master/r/34239 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-06-02ARM: tegra: touch: Support for PM269 touchPradeep Goudagunta
Added Support to read board ID and enable always Atmel touch for PM269 board. Bug 823160 Change-Id: I1a5d8cccda848c3c9754bc15c51d79a7b276166e Reviewed-on: http://git-master/r/30370 Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com> Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
2011-06-02ARM: tegra: enterprise: Fix sensors orientationKrishna Yarlagadda
Set correct orientation for accelerometer, gyro and compass on enterprise board Bug 833671 Change-Id: I0c63e00e22b5128870b1c38da22cb9165f224fb1 Reviewed-on: http://git-master/r/34528 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-06-02ARM: tegra: Cardhu: increase framebuffer size to 8MPritesh Raithatha
Bug 827221 Change-Id: Iebb71993e618352766309d225908a0152b252bcb Reviewed-on: http://git-master/r/34895 Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com> Tested-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-by: Vidya Sagar <vidyas@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Kaushik Sen <ksen@nvidia.com>
2011-06-02Revert "ARM: l2x0: Optimise the range based operations"Surajit Podder
This reverts commit 1ef973c552eb9ac128c882e53f2fe5b0613ff5c4. Reverting this change as it fixes some regressions. Fix for Bug: 831038 Change-Id: I7ad194eaf5ca1a475446840e887bcb70d797a72d Reviewed-on: http://git-master/r/34720 Tested-by: Surajit Podder <spodder@nvidia.com> Reviewed-by: Rajesh Kumar <rajkumar@nvidia.com> Tested-by: Rajesh Kumar <rajkumar@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-06-01usb: phy: tegra: regulator enabled by defaultSuresh Mangipudi
Hotplug does not work if the regulator is disabled, so keep it enabled until the device wants to enter lowpower mode. (cherry picked from commit 9fcdbe83d85021e6cfbfb075240b6a8439f308e0) Change-Id: Idd7e9bfbcd7d47e510fc2b92bbee80d3e192f5e4 Reviewed-on: http://git-master/r/34472 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-06-01usb: fsl_udc: Resume of device mode optimized.Suresh Mangipudi
Having the device resume and suspend when the cable is not present is an overhead for the system. Hence removed resume and device function calls when the cable is not present. Bug 803280 (cherry picked from commit cae416e076b8c31c422b71b6df82a7921132ee11) Change-Id: I8595bfbb5b5cb1cfa3d20e68ae1b6ef7755f1e3e Reviewed-on: http://git-master/r/34452 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-06-01arm: tegra: pinmux: debugfs: Handling INVALID pinmux optionLaxman Dewangan
When any pinmux is selected as INVALID option, may be POR, taking dump of pinmux through debugfs interface is displaying junk character/ crashing the kernel. Fixing this issue by handling correctly the INVALID option. Change-Id: I32c0ad0ba12ea44bc8fd1e2ec2ccb50269210f67 Reviewed-on: http://git-master/r/34429 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-06-01sound: soc: tegra: add dai for i2s_device0Tom Cherry
Change-Id: Ib0662de97f4f98461f1003747340bb9e16f96ebb Reviewed-on: http://git-master/r/34258 Tested-by: Ravindra Lokhande <rlokhande@nvidia.com> Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Thomas Cherry <tcherry@nvidia.com> Tested-by: Thomas Cherry <tcherry@nvidia.com>
2011-06-01sound: soc: tegra: maxim 98088 codec integrationTom Cherry
Change-Id: Ie8c616482017c869cd46b8100f0428c1f92a3bcf Reviewed-on: http://git-master/r/34238 Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com> Tested-by: Ravindra Lokhande <rlokhande@nvidia.com> Reviewed-by: Scott Peterson <speterson@nvidia.com> Reviewed-by: Thomas Cherry <tcherry@nvidia.com> Tested-by: Thomas Cherry <tcherry@nvidia.com>
2011-06-01arm: defconfig: Enable max98088 codec on enterpriseTom Cherry
Change-Id: Ied6c1457349e20be26db96d7aac0c0f82a85423a Reviewed-on: http://git-master/r/34237 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-06-01mfd: tps6591x: Protecting tps write register through lockLaxman Dewangan
Protecting the tps6591x register writes/update/clearing bit/setting bit through lock. Also fixed some of logical error. Change-Id: I2df44d65a62027c4a03d3c770655bebe3b394b7b Reviewed-on: http://git-master/r/33145 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-06-01arm: tegra: ventana: ldo6 uses 1.8v alwaysVarun Wadekar
camera needs LDO6 to be 1.8v always. the same was done in the camera init code but was causing issues because of recent changes in the regulator core. fixing this issue by setting LDO6 to 1.8v at during regulator init. Bug 832292 Change-Id: I185d83f5f31640d30c2c04acc28ccbb04f9f0557 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/34473 Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-by: Abhinav Sinha <absinha@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-06-01arm: tegra: hdmi: changes for enabling 5v supply.mohit singh
- merged changes from board-cardhu-panel.c to board-enterprise-panel.c - also changed the 5v string name. - bug 830124. Change-Id: I6d0058611062fda5afbceb2e0082906cdb3ad422 Reviewed-on: http://git-master/r/34470 Tested-by: Mohit Singh <mpsingh@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2011-06-01arm: tegra: otg: Set platform data to NULLSuresh Mangipudi
Set the platform data for the USB1 host mode to NULL during the unregister. After freeing up the platform data pointer. Bug 820333 (cherry picked from commit 3d416101e629b50c9060e3daed7ab1281a465de5) Change-Id: I432a7315ed3a2ff3c1d8d961f6f1e981451b22fe Reviewed-on: http://git-master/r/34459 Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com> Tested-by: Suresh Mangipudi <smangipudi@nvidia.com> Reviewed-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
2011-06-01arm: tegra: enterprise: Filling regulator supply infoLaxman Dewangan
Filling the supply names for all regulator based on power diagram/ schematic of enterprise board. bug 830124 Change-Id: I69288ef742acca7e7011f41c918e9ddab5a0032d Reviewed-on: http://git-master/r/34422 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Mohit Singh <mpsingh@nvidia.com> Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
2011-06-01[ARM] OProfile: backtracing support for Android applicationsOleg Strikov
Number of changes in stack organization template that OProfile uses for backtracing. We have the same patch for Froyo tree. GB/HC have another OProfile source files structure and that is why we need one more patch. Change-Id: I20916f9232eefbcea01f90c24dd5d91d984d0bb4 Reviewed-on: http://git-master/r/21143 Reviewed-by: Prajakta Gudadhe <pgudadhe@nvidia.com> Reviewed-by: Ryan Bissell <rbissell@nvidia.com> Tested-by: Ryan Bissell <rbissell@nvidia.com>
2011-05-31arm: tegra: Change Tegra3 L2 cache prefetch to next lineScott Williams
Change L2 cache prefetch offset from 8th line to next line. Change-Id: Ie88008e2ab5a882235ae91d71d193e898ca67121 Reviewed-on: http://git-master/r/33195 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-05-31ARM: tegra: Clear speedo_id on incorrectly fused Tegra3Alex Frid
Change-Id: I9a6e29acadae06360d0f2e2e94c049378758840e Reviewed-on: http://git-master/r/33084 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-05-31media: tegra: avp: Clear interrupt registers when AVP startsKaz Fukuoka
There was no code to clear interrupt registers for AVP. First run of AVP was OK because those registers start from reset value. But because those registers were not cleared, when the second time AVP was started, some interrupts were enabled too early. That caused interrupts coming before handlers were ready. This change also removes the workaroud for the bug. bug 827353 bug 826234 Change-Id: I51546400f0bace67dfcdb23f667c051c060d3983 Reviewed-on: http://git-master/r/33083 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-05-31ARM: tegra: clocks: sku limit for pclkPrashant Gaikwad
sclk max rate for AP25 is 300MHz and pclk is set as 1:2 to sclk. pclk max rate changed to 150MHz for AP25. Bug 821534 Reviewed-on: http://git-master/r/31311 (cherry picked from commit 3655e9a4940bfa39ba103903f2e2f1d5f0cf7e2d) Change-Id: Id10c322892e646c2c1f74cbf36268608fc268493 Reviewed-on: http://git-master/r/32874 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-05-31arm: tegra: Clean up SOC conditionalsScott Williams
Change SOC conditionals to make them more forward-looking. Change-Id: Ib60db4e690c2f396afdec962616d735548b5a8a9 Reviewed-on: http://git-master/r/32706 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-05-31[ARM] tegra: Extend the wait interface in the hostPaul Hodgson
Extend the wait interface to relay the actual resultant waited point back. Change-Id: Idbaa96b186390a2383ef2cc99aefb950648a2d19 Reviewed-on: http://git-master/r/23033 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-05-31rtc: tps6586x: fix error in setting alarm1Ken Chang
Alarm1 expiration time is set based on rtc value. Should not compare the absolute rtc value with the valid range of alarm1 directly, expiration time from now is used instead. Bug 832563 Change-Id: I338e7ee684b5cad6b2fba99b5ac4ec6cff9b75cd Reviewed-on: http://git-master/r/34295 Tested-by: Ken Chang <kenc@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Yu-Fong (Foster) Cho <ycho@nvidia.com>
2011-05-31ARM: tegra: ventana: Adding polarity of SD card WP gpio.Pavan Kunapuli
For ventana, adding the polarity of the gpio used for detecting the write protection status of the sd card. Bug 831035 Change-Id: I4d41327f4507dc0f4ee440c8d75c7de751b32803 Reviewed-on: http://git-master/r/32934 Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-05-31ARM: tegra: power: Update Tegra3 EMC DFS tableAlex Frid
Change-Id: I29db9923c269c1c957342ca32ba0763daca05931 Reviewed-on: http://git-master/r/32685 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-31ARM: defconfig: enable TEGRA_CONSERVATIVE_GOV_ON_EARLYSUPSENDBharat Nihalani
This config is enabled for all tegra boards Bug 817727 Change-Id: Ib5fa1fd7703f64550685ff9bd5968d8467c72aac Reviewed-on: http://git-master/r/32197 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-05-31Revert "[ARM]: tegra: common: prune common clock init table"Alex Frid
This reverts commit 297affd79bf347eb5938ff8e8e811ecf64d58983. Change-Id: Ie358b5e2d05e86a2e57b669892f68a56a4560c15 Reviewed-on: http://git-master/r/34278 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-05-27Revert "arm: tegra: clock: Reading APB bus before disabling clock"Niket Sirsi
This reverts commit 9b2aa51a8b4913948e3061706498c7f91d5aa827. Change-Id: Ie197a9822329c7e36735ef673d0baf69923197de Reviewed-on: http://git-master/r/34389 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-05-27ARM: tegra: clocks: Completely remove DVFS for FPGA platformsScott Williams
Dynamic Voltage & Frequency Scaling (DVFS) is not possible on FPGA platforms. Completely remove the DVFS code from the image on FPGA platforms to reduce the image size. Change-Id: I4f1a8587f01e775000f48fbca7c85d75acee9c74 Reviewed-on: http://git-master/r/32466 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-05-27ARM: tegra: common: dynamic cpufreq governorBharat Nihalani
To improve the power consumption situation for MP3 playback the scaling governor is set to conservative when display is turned off and the default governor is saved. The governor is restored when display is turned on. Bug 817727 Original work done by "Wen Yi <wyi@nvidia.com>" Change-Id: I43ffb0d508cc6d0a80eeeffcbab77526b644c437 Reviewed-on: http://git-master/r/32194 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-05-27misc: nct1008: set edp zone on driver initializationAlex Frid
Change-Id: I2f578aee6dea911ebbe63cdcb5c9a7ddfcdf2264 Reviewed-on: http://git-master/r/32862 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-27ARM: tegra: power: Update CPU EDP initializationAlex Frid
Do not overwrite thermal zone and preserve boot CPU rate settings if thermal sensor is initialized before edp governor. Change-Id: Ia705d5f453003c204459f594ffb95152ff74145f Reviewed-on: http://git-master/r/32861 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-27ARM: tegra: dvfs: Fix uninitialized variable useAlex Frid
Completing fix started by 68e857d94f35286b9b359feef1e1dddc7e2aea8b. Change-Id: I61e9051da3d7aacd460d15ef8ff161b678c8fec1 Reviewed-on: http://git-master/r/32829 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: David Schalig <dschalig@nvidia.com> Tested-by: David Schalig <dschalig@nvidia.com>
2011-05-27ARM: tegra: clock: Fix speedo_id eval for max speedo valueDiwakar Tundlam
Change-Id: Ia36ea70b054262772df39650b5fdc7419be2bfcf Reviewed-on: http://git-master/r/32802 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-27arm: tegra: cardhu: Configuring DEV_SLP and gpio2 for A04Laxman Dewangan
Configuring the tps6591x into DEV_SLP mode and gpio2 of tps6591x into sleep mode for E1291-A04 board. This is required in order to have the gpio2 follow the 'CORE_PWR_REQ' pin in E1291-A04. GPIO2 of tps6591x is connected to the EN of the DC-DC converter which supply core voltage. bug 821295 Change-Id: I01a8fa6c056872cff84dd0f2ae7601cee298ebcf Reviewed-on: http://git-master/r/32614 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-27mfd: tps6591x: Adding init time configuration for gpiosLaxman Dewangan
Adding the init configuration parameter for initializing the gpio of tps6591x pmic device. The configuration parameter is passed through platform data. bug 821295 Change-Id: If83e0b7edfec4d15a879fcf9085506573efbc1ac Reviewed-on: http://git-master/r/32613 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-05-27arm: tegra: gpio: Implementation for gpio_to_irqLaxman Dewangan
Adding the support in function gpio_to_irq() such that the external gpio peripheral driver can provide the gpio to irq number through their gpio implementation. Change-Id: Ibab369df435af79ce09d71e491a8ee851f2228ba Reviewed-on: http://git-master/r/32563 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-05-27arm: tegra: clock: Reading APB bus before disabling clockLaxman Dewangan
It may be possible that write operation on apb bus does not get complete before disabling clock if the clock is disabled just after the write on apb bus. To have proper sequence of operation, it is require to read back the apb bus to make sure the write operation is completed. bug 830481 Change-Id: If4767b77a9ac8fdf3253e19d6aebed6c1d13dc5a Reviewed-on: http://git-master/r/32556 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
2011-05-27media: tegra: avp: Avoid NULL reference in case of errorKaz Fukuoka
In case of avp_init() failure, NULL pointer was referenced, and caused kernel panic. bug 828027 Change-Id: I748f439b39db086be856bf4d6b2ec98c4ad3559a Reviewed-on: http://git-master/r/32141 Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com> Tested-by: Kaz Fukuoka <kfukuoka@nvidia.com> Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2011-05-27serial: core: restore termios settings when resume console portspuneet saxena
The commit 4547be7 rewrites suspend and resume functions. According to this rewrite, when a serial port is a printk console device and can suspend(without set no_console_suspend flag), it will definitely call set_termios function during its resume, but parameter termios isn't initialized, this will pass an unpredictable config to the serial port. If this serial port is not a userspace opened tty device , a suspend and resume action will make this serial port unusable. I.E. ttyS0 is a printk console device, ttyS1 or keyboard+display is userspace tty device, a suspend/resume action will make ttyS0 unusable. If a serial port is both a printk console device and an opened tty device, this issue can be overcome because it will call set_termios again with the correct parameter in the uart_change_speed function. Refer to the deleted content of commit 4547be7, revert parts relate to restore settings into parameter termios. It is safe because if a serial port is a printk console only device, the only meaningful field in termios is c_cflag and its old config is saved in uport->cons->cflag, if this port is also an opened tty device, it will clear uport->cons->cflag in the uart_open and the old config is saved in tty->termios. refer http://git.kernel.org/?p=linux/kernel/git/stable/linux-2.6.37.y.git; a=commit;h=891b9dd10764352926e1e107756aa229dfa2c210 cherry-pick the changes from the kernel 2.6.37 commit id :891b9dd10764352926e1e107756aa229dfa2c210 Bug 758845 Change-Id: I0420321598514524bf21fa90c269c1493cf66488 Reviewed-on: http://git-master/r/20302 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Alex Courbot <acourbot@nvidia.com> Tested-by: Alex Courbot <acourbot@nvidia.com> Reviewed-by: Puneet Saxena <puneets@nvidia.com> Tested-by: Puneet Saxena <puneets@nvidia.com>
2011-05-26ARM: defconfig: enable mpu sensors for enterpriseKrishna Yarlagadda
Following configs have been enabled in enterprise defconfig CONFIG_MPU_SENSORS_MPU3050 CONFIG_MPU_SENSORS_KXTF9 CONFIG_MPU_SENSORS_AK8975 Bug 827932 Change-Id: Ica31c794e602b24f3d42146bb1df77b2cbd131ea Reviewed-on: http://git-master/r/32153 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-05-26ARM: defconfig: enable nct1008 on enterpriseKrishna Yarlagadda
enable nct1008 config CONFIG_SENSORS_NCT1008 on enterprise Change-Id: If32137bceb668f1a5d4eac19882177828a7121be Reviewed-on: http://git-master/r/32365 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-05-26ARM: tegra: sensors: Support nct1008 on enterpriseKrishna Yarlagadda
Register nct1008 on enterprise Change-Id: Ib555c7daee097f39b722acd34ec8097937c90b48 Reviewed-on: http://git-master/r/32364 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-05-26ARM: tegra: sensors: Add support for enterpriseKrishna Yarlagadda
Enable mpu and isl & proxy sensors for enterprise board Bug 827932 Change-Id: I735790f722b143ac654b5f8c0b1d4b3914e693d9 Reviewed-on: http://git-master/r/31879 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-05-26arm: config: enterprise: Enabling TPS80031Pradeep Goudagunta
-Enable TPS80031 -disable TWL4030 and DUMMY_REGULATOR which are not used by enterprise Change-Id: Iae9a146c78fdf9267b2d2dff000ea91b73ccb471 Reviewed-on: http://git-master/r/32973 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-25 14:22:12 +0000