Age | Commit message (Collapse) | Author |
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To enable dpd override of the kbc pins during suspend, it needs to
write into dpd override register. By mistake, it was also resetting
the other configuration bits.
Fixing this issue.
bug 739052
Change-Id: I06cf4a7252157418a4789281a79f79946d7f2bdc
Reviewed-on: http://git-master/r/7500
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Harry Hong <hhong@nvidia.com>
Tested-by: Harry Hong <hhong@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Adding this support to allow USB webcam verification on Ventana.
Bug 722146
Change-Id: Id856ca674faf9cd663fcaf1042569c9b2d733aa8
Reviewed-on: http://git-master/r/7595
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
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On k32, remote wake up is enabled in the descriptor based on gadget->ops. Since,
remote wakeup is not supported, disabled gadget->op->remote_wakeup based
on USB_ANDROID.
Bug 710624
(cherry picked from commit c0340053278c9c9ceb98772cc3566d298dca4d9a)
Change-Id: I760632dd38a9f56dadfbb4d446e83f28cdb5338f
Reviewed-on: http://git-master/r/7556
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Tested-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
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Keep enabling the kc controller only if any of keys are configured
as wakeup source during suspend.
bug 735233
(cherry picked from commit 13825a46587b0508aa7a43054964b76524d5f2b6)
Change-Id: I028965400ee4f96c1460f8e261a2376943384030
Reviewed-on: http://git-master/r/7499
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Enabling the config variable CONFIG_I2C_CHARDEV to
enable I2C device interface from user space.
With enabling this, i2c-* device files will be found
in /dev directory. This make it possible to use the
user-space programs to use the I2C bus.
bug 723618
Change-Id: Ib0702e02638f34089ff448b5f28ba8e999544612
Reviewed-on: http://git-master/r/7423
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Expanded CPU DVFS tables to include AP25/T25 data.
Dependency on tegra core commit 7fedffa609eaa8288b2db93068a88a509f5268df
Bug 643434
Change-Id: I705e7373007aed0b524dda221f690162880fd585
Reviewed-on: http://git-master/r/7243
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Enabling the config variable ISL29018 for enabling the driver
for light sensor ISL29018.
Change-Id: I676ba2493e8d590d379f81177ce8b036dd271a4d
Reviewed-on: http://git-master/r/7196
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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During LP0 suspend host mode context is not saved and this makes atatched device
to re-enumerate after coming out of the LP0. To fix this USB context registers
are saved during LP0 suspend and restored back on LP0 resume.
Bug 721762
(cherry picked from commit c4ff3f80540e0228790ea568464b2a8078cce188)
Change-Id: I2b57abcfc6451ceccc545c648c0182a6b81dec71
Reviewed-on: http://git-master/r/7185
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Tested-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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With dmix appl_ptr is not modified i.e. it remains 0. Removed
the check using appl_ptr to avoid playback of last few buffer,
added more reasonable fix.
For Bug 734678
Change-Id: I0046541c0dece9c5f61b23430b60ac43d3c47a3b
Reviewed-on: http://git-master/r/7193
Tested-by: Manjula Gupta <magupta@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Putting in IPv6 Security related dependencies.
Bug: 690020, 690023, 687255
Change-Id: Ie8fe292eca61657e1dad816126849872bd3f9111
Reviewed-on: http://git-master/r/7132
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
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enabling BT wake source to wake up the system from low
power modes.
Bug 680524, 691608
Change-Id: Icc63ab86616da302270325f9d4867834af645785
Reviewed-on: http://git-master/r/6854
Reviewed-by: Anantha Idapalapati <aidapalapati@nvidia.com>
Tested-by: Anantha Idapalapati <aidapalapati@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Bluesleep driver manages the power of BT chip. now enabling the driver
in the default build of ventana.
Bug 680524, 691608
(cherry picked from commit 9e75f8c8a105bc82f280eeed4284a1bf8779b048)
Change-Id: Ied1c31a2f7f63eddf201bd7c82c116effa10deaf
Reviewed-on: http://git-master/r/6852
Reviewed-by: Udaykumar Rameshchan Raval <uraval@nvidia.com>
Reviewed-by: Anantha Idapalapati <aidapalapati@nvidia.com>
Tested-by: Anantha Idapalapati <aidapalapati@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Based on CONFIG_BT_BLUESLEEP configuration variable, a bluesleep device
will be created and used to actively manage the BT device power.
Bug 680524
Bug 691608
Change-Id: If2f470a385392ad7a94b6d69a919be55487569e9
(cherry picked from commit 011a705248274804c80c12af5366693e6662829b)
Change-Id: If2f470a385392ad7a94b6d69a919be55487569e9
Reviewed-on: http://git-master/r/6851
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
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A new driver is implemented to actively manage the bluetooth module
power. bluesleep also tries to manage the power of the transport used.
Two signals (GPIOs) are used to manage the power events.
BT_WAKE : signal from HOST to BT chip to intimate BT chip can sleep.
HOST_WAKE: signal from BT chip to HOST to intimate HOST should wakeup/
activate the transport modules required for BT communication.
Bug 680524, 691608
(cherry picked from commit 111f4ccd3c4cfde2fa52ae4c0c56a2288c3af3a8)
Change-Id: I5edba2aa18c566f0ebfc4ecf9c54149ee3376666
Reviewed-on: http://git-master/r/6850
Reviewed-by: Udaykumar Rameshchan Raval <uraval@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Anantha Idapalapati <aidapalapati@nvidia.com>
Tested-by: Anantha Idapalapati <aidapalapati@nvidia.com>
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RIL interacing with UARTA is using the 4 line.
The correct configuration for this interface is Config6.
Currently it is config1 which is causing the issue on other
pin operation.
Fixing this issue.
bug 710711
Change-Id: I68e426de4597f87d832fb934e2cf6120e898b3de
Reviewed-on: http://git-master/r/7100
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Moving the isl29018 from hwmon to the staging/iio/light driver.
Replacing the hwmon registration with iio registration and doing
required changes to make it iio driver.
bug 728678
(cherry picked from commit 2c72f7dff2b74375b35936cd4c94a891f169009d)
Change-Id: I223d4451b62f2260cd2f9ee2ed8ba77ec8672b52
Reviewed-on: http://git-master/r/7109
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Enabled EMC DFS for Whistler E1112 board with Elpida LPDDR2.
Change-Id: Id6a09e1b96120d44af95498d9c6ef8e3e318bb0b
Reviewed-on: http://git-master/r/7044
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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The isl29018 driver have moved from hwmon to iio and so config
varaible name changed. Changing config name in board specific file.
(cherry picked from commit 50bb444f37080936d94e0c99bdcec1756d254901)
Change-Id: I6bed55c9e2bc907678e6ba927817d3f380cdb53b
Reviewed-on: http://git-master.nvidia.com/r/7110
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Following are changes:
- using smbus api to read/write from/to device.
- Adding proximitysensing with scheme 0 and 1.
- Adding ir sensing.
- Removing the undesired definition and code.
- Remove gpio initialzation and usage.
- Sysfs interface for setting range/resolution/proximity scheme.
- sysfs interface for reading lux/proximity ir and ir.
- General code cleaning.
(cherry picked from commit 0a148f035c9284cfa0e60e875052d6768267d731)
Change-Id: I0d84f534a14b85e5a6bcea3218ecd8d864c0a103
Reviewed-on: http://git-master.nvidia.com/r/7102
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Tested-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Reduced ACM timeout to 2ms (from 1sec). This is necessary to detect
host / 3D idle under frequent activity bursts.
Bug 735111
Bug 726052
(cherry picked from commit 1ff7aa46f02f61f070ae41abd8e0a36d4a4f1f3d)
Change-Id: I711286925776c2955f7c43acae0cb8b2c1763e4a
Reviewed-on: http://git-master.nvidia.com/r/7007
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Niranjan Wartikar <nwartikar@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Changed PLLC settings to increase comparison and VCO frequency for
12MHz and 26MHz reference clocks. Kept PLLC settings unchanged for
other reference clocks. Setup constant charge pump control for all
HDMI PLL configurations.
Bug 734868
Bug 719667
Change-Id: I6a34bbebc39042dbf9645cb84538eacf775eb8ff
Reviewed-on: http://git-master.nvidia.com/r/6752
Reviewed-by: Hoang Pham <hopham@nvidia.com>
Tested-by: Hoang Pham <hopham@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Nvrm exposes nvrm DMA APIs to allocate and use the DMA channel
from user mode. I2S (i.e audio HAL) is the main user of these
APIs. When the process that allocates the handles doesn't free-up
and crashes, RM reftracker driver will clean up the handles its
on-behalf. Same mechanism already exists for the mmeory handles.
bug 730003
Change-Id: Iceb5c3b6d22989463d184c90e25ab06f6979b5a4
Reviewed-on: http://git-master.nvidia.com/r/7013
Tested-by: Victor (Weiguo) Pan <wpan@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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limit the number of times adb_open and adb_release may be printed
in a short period of time, to prevent adb death spirals when
exiting suspend
(cherry picked from commit 3a1e33f6715f7133ba9fe26d68342c1ff6106b20)
Change-Id: I575f38269c9a4c46a3a59ff7a06c8bda36a0c0d4
Reviewed-on: http://git-master/r/6723
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
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enable rtc as a valid wake up source/event on ventana.
Bug 728544
(cherry picked from commit a93c1ee40eddaa6c2244c30f03868fb589fdf062)
Change-Id: Ib1ee0211d3a69a6dbb83f6b78ebc89863c64a499
Reviewed-on: http://git-master.nvidia.com/r/6778
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Tested-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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X direction needs to be reversed to correct orientation in portrait
mode for Whistler.
Bug 678250
Reviewed-on: http://git-master/r/6661
Tested-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
(cherry picked from commit 2406bc176b9bb86bd7b6c9e707c4e44b97d997d6)
Change-Id: I35eff83ba9cb39d49062f2fb9e01d968543b7bde
Reviewed-on: http://git-master/r/6767
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When user doesn't use default heap policy and selects
GART or carveout allocation, automatic single-page-to-sysmem
rule doesn't work. Because of broken rule many single page
allocations go to GART and carveout.
The fix adds sysmem bit to heap mask when allocation is
single page and GART or carveout is present in heap mask.
bug 730124
bug 731923
(cherry picked from commit 3ca9989c922420a57215d297189738a0464c4073)
Change-Id: I2ea8018ae5ed9d31e90659479d0e44052ebf9431
Reviewed-on: http://git-master/r/6701
Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com>
Tested-by: Kirill Artamonov <kartamonov@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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- Completely removed busy hints for the SPI channel connected to PMU
(busy hints were allowed for for CS, other than PMU, which may create
dead-lock if channel access is serialized).
- Increased APB low corner to 36MHz for reliable SPI communications
at default low frequencies.
Bug 721076
(cherry picked from commit 50ccc3cb8f0956370f1841e83133f47c88615889)
Change-Id: I0a119610608bc5db4d7daea68bd9d4285d3715e8
Reviewed-on: http://git-master.nvidia.com/r/6744
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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add a driver for the hardware watchdog timer embedded in NVIDIA
Tegra SoCs
Change-Id: I40730213119b4f325e3de008a5efb28f5d578b1c
Signed-off-by: Gary King <gking@nvidia.com>
Reviewed-on: http://git-master/r/6305
Reviewed-on: http://git-master/r/6705
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bug 715382
Integrate from tegra-2010-07
Change-Id: I790bd0e6ff5ddd9513ae7a5ddfce491dcd1e32b3
Reviewed-on: http://git-master/r/6673
Reviewed-by: Markus Holtmanns <mholtmanns@nvidia.com>
Reviewed-by: Antti Hatala <ahatala@nvidia.com>
Tested-by: Antti Hatala <ahatala@nvidia.com>
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When system runs out of dma and uart driver tries to allocate
dma, the dma allocation fails. In such case, the uart
communication should work with interrupt based -non dma mode.
bug 730003
(cherry picked from commit 4a9d5633474c806799ccc6d167f3d624c92d560c)
(cherry picked from commit 2000a076103c559446d11ad49debc4e0f2952e8a)
Change-Id: I96c2a3f79fd9044e3b54771b60cad7dcb12f517b
Reviewed-on: http://git-master/r/6599
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Harry Hong <hhong@nvidia.com>
Tested-by: Harry Hong <hhong@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Print out wake status when resuming back from LP0.
Bug 725727
Change-Id: Iede6aa7314e4912ff7ccadccbab90f097deab893
Reviewed-on: http://git-master.nvidia.com/r/6549
Tested-by: Victor (Weiguo) Pan <wpan@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Bug 720137
(cherry picked from commit 3a86bacc8a8cf8c593028a7594867df00a45a189)
Change-Id: I9a35a9a41c2d27e36ff651650633cf6c59cc2e57
Reviewed-on: http://git-master.nvidia.com/r/6456
Reviewed-by: Andy Carman <acarman@nvidia.com>
Tested-by: Andy Carman <acarman@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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[bug] 729378
Change-Id: I34d276d2552491c933983309df0fe31f7bf3ba7e
Reviewed-on: http://git-master/r/6443
Reviewed-by: Andy Carman <acarman@nvidia.com>
Tested-by: Andy Carman <acarman@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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To support IPv6 and Network Traffic Stats
related CTS tests.
Bug: 690020, 690023, 687255
Change-Id: I5b14c908ba544196da6000d598a11fd1b33780ef
Reviewed-on: http://git-master/r/6597
Reviewed-by: Rahul Bansal <rbansal@nvidia.com>
Tested-by: Rahul Bansal <rbansal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Adding the valid pointer checks before accessing the pointers
which is passed when public apis are called.
Also resetting the pointers to null once the allocated handles
are freed.
(cherry picked from commit 0954407534a757b316bc35a0232968feed23243a)
Change-Id: Ib8b99f0556fb9a98c74ba8911a00879451fad9e5
Reviewed-on: http://git-master/r/6578
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Separated PLLD and PLLC HDMI settings. Changed PLLD settings to
increase comparison frequency for 12MHz and 26MHz reference clocks.
Kept PLLD settings for other reference clocks and all PLLC settings
unchanged. Idempotent PLL configuration clean up.
Bug 719667
Change-Id: I882ca2d8a98618518099a5b9482526d5556ba8ea
Reviewed-on: http://git-master/r/6340
Tested-by: Hoang Pham <hopham@nvidia.com>
Reviewed-by: Hoang Pham <hopham@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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When uart_close() or uart_suspend() calls the tegra_uart_suspend()
the drivers waits in tight loop for tx to be empty. This wait is
not required because serial_core driver have already waited for the
tx fifo to empty with proper timeout before calling these function.
bug 730612
(cherry picked from commit 13387c532dfb35dc672b290aec8b7a4db49730d6)
(cherry picked from commit ddd896c933e3f8d5fb28948ad957ec12b3d881cd)
Change-Id: Ie898ad0a134684844bf80ae00a1c8dd4b02a605a
Reviewed-on: http://git-master/r/6372
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Harry Hong <hhong@nvidia.com>
Tested-by: Harry Hong <hhong@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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If pinmux is not configured for the uart channel then will not
be registering the uart device.
bug 731336
(cherry picked from commit e496189740d18903db1de44cd96b96e07c93d8b7)
Change-Id: Ib5a97425f991f16d280bfaabb00febacab392fe1
Reviewed-on: http://git-master/r/6373
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Harry Hong <hhong@nvidia.com>
Tested-by: Harry Hong <hhong@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Enabled EMC DFS for Whistler E1112 board with Samsung LPDDR2.
Bug 725563
Change-Id: I65cd32365f5739b1d82b1f0a84d794245a6c98a9
Reviewed-on: http://git-master/r/6319
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Replaced assert on powering down of already powered off module with
skipping the power down procedure in this situation is detected. WAR
for bug 727964.
(cherry picked from commit c562c8fdf58a552fe9ba1c62ffec66e0b67447e5)
Change-Id: I2f55052d38874bf196bc89a06fa478aa3e9783c2
Reviewed-on: http://git-master/r/6283
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Added nvhost device resume function, and moved syncpoints restoration
here from run-time power_host() control. Respectively added syncpoints
saving to nvhost suspend procedure. This change is required, since
power_host() has no way to account for display advancing syncpoints
after they have been already saved.
Bug 726052
(cherry picked from commit 629bbd439e1bb156a8cfce3de9384e42586d4f42)
Change-Id: I6149cfa1bff72cb9b5e9e9da0f302c7d8a3032a0
Reviewed-on: http://git-master/r/6282
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Set pulse mode for 3D busy hints to speed up frequency/voltage
decrease after hint is canceled.
Bug 726052
(cherry picked from commit 58c01c2fc28a3e90e661954ab76cd7f65b0bd2cf)
Change-Id: I77a77d9fc73b1675bdaddb08663cfed07900ffa7
Reviewed-on: http://git-master/r/6281
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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MSD write performance is decreased due to the file_sync() called in the write
path this is introduced in the K32. After removing this write performance is
increased and it is back to K29.
Bug 727609
(cherry picked from commit 3674a60b8d4ede5d9305bf59a205e9f16e025f2a)
Change-Id: I99e63302e1b189b600163c216847eae437e86a9f
Reviewed-on: http://git-master/r/6246
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Tested-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Fixes bug 678250
Reviewed-on: http://git-master/r/5583
Tested-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
(cherry picked from commit bcd2f2e113fb10b321272a53c2c0e015099e3ea8)
Change-Id: I985af6334389e257ae6acd37e85c17391200b649
Reviewed-on: http://git-master.nvidia.com/r/6056
Tested-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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In NvRmDmaStartDmaTransfer(), the memory is allocated for
the dma action. The allocated memory does not get initialized
and so uninitialized member unintentionally changing the
behavior of dma.
Allocating memory with zero initialized.
bug 728661
(cherry picked from commit ac036af2c9599c419c12a8ba1c4309a9d8364b21)
Change-Id: Ie36db6ad88eb9a9870f53b2c685eed6888decaf9
Reviewed-on: http://git-master.nvidia.com/r/6052
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Added non-boot PLL (PLLC/PLLA/PLLD) restoration during clock resume
before clock dividers are restored. (Current restoration in RM happens
late after clock dividers are restored).
Change-Id: I9661f5ddba0ba4b25d5a00c78820792791777429
Reviewed-on: http://git-master/r/5515
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Iqbal Bhinderwala <iqbalb@nvidia.com>
Reviewed-by: Rajkumar Jayaraman <rjayaraman@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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The dma can be allocated from multiple client in run time
and so it should be thread/smp safe.
Returning proper error pointer in case of there is no dma to
allocate.
bug 723220
Change-Id: Ifb333d4b14e32be561e34a0d7668a2d631ac80c6
(cherry picked from commit db2d10f715fcdd6fdaf5fc7ea8e27a505f8332da)
Reviewed-on: http://git-master/r/5769
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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When dma is aborted, all request should be dequeued from
the dma and the allocated memory should be freed.
The allocated resource was not getting freed, fixing this
issue.
Properly checking the return pointer from the allocate_dma.
(cherry picked from commit 02f0e4da9c66fee14f4492fa5b4ec41fd028a56e)
Change-Id: I0dbaeca9b19331458b9aaf91556b7dad1e9b67ee
Reviewed-on: http://git-master/r/5768
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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The maximum interface frequency configured by the spi driver should
not more than the requested interface freq.
Correcting the passed argument to behave the clock driver accordingly.
Change-Id: I6e1beea7f01fb410f5e2755406b7d4dac7fd570d
Reviewed-on: http://git-master/r/5573
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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