summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2014-04-04ENGR00306992 Revert "ENGR00302036-3 gpu:gpu2d may cause bus hang in some ↵rel_imx_3.10.17_1.0.0_ga3.10-imx6-3.10.17-1.0.0-ts1Loren Huang
corner case" This reverts commit 563931094bf096da2ce6f2cc40387f9e726b3342. That patch causes wrong blitting and will block GA release Date: Apr 04, 2014 Signed-off-by: Loren Huang <b02279@freescale.com> Acked-by: Shawn Guo
2014-04-03ENGR00306875-2 video: mxc_hdmi: Set hdmi cable state a bit earilierNicolin Chen
During hdmi hotplug test, there's a possibility that X-server unblanks the frame buffer while HDMI-audio just gets the signal to start playback. Then audio would get an unblanked state right before the playback and bypassed the DMA enabling code. So this issue is caused by the race between unblank and set_cable_state(). This patch sets the hdmi cable state a bit earilier so as to let audio play first. If unblank happens later, the hdmi core and hdmi audio would be robust enough to handle that case as long as it's not racing with the other parts. Acked-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
2014-04-03ENGR00306875-1 Revert "ENGR00305624-2 ASoC: imx-hdmi-dma: Correct the appl ↵Nicolin Chen
pointer" After change the pointer, ALSA lib would re-copy the initial data to DMA buffer because the pointer is pointing the zero position at the beginning, which results an audiable duplicated playback at the first eight periods. Even though dropping this patch would cause pointer being incorrectly estimated. But to maintain the sanity of basic playback, we revert the previous patch. This reverts commit 5d0d4e1558fa0c235691436e1c5d26d9c8950775. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
2014-04-03ENGR00306832 mxsfb: xres_virtual should not larger than xresSandor Yu
eLCDIF did not support stride buffer, check the xres_virtual in function mxfb_check_var, return false if the value larger than xres. Signed-off-by: Sandor Yu <R01008@freescale.com>
2014-04-02ENGR00298286 arm: dts: imx6qdl: add clock to CAAM.Dan Douglass
CAAM depends on the clock used by WEIM interface. This patch supplied by Haung Shijie corrects the issue by adding the clock as a resource for the CAAM driver. Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
2014-04-02ENGR00298286 arm: dts: imx6qdl: add clock to CAAM.Dan Douglass
CAAM depends on the clock used by WEIM interface. This patch supplied by Haung Shijie corrects the issue by adding the clock to the device tree entry for CAAM. Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
2014-04-02ARM: 7669/1: keep __my_cpu_offset consistent with generic oneMing Lei
Commit 14318efb(ARM: 7587/1: implement optimized percpu variable access) introduces arm's __my_cpu_offset to optimize percpu vaiable access, which really works well on hackbench, but will cause __my_cpu_offset to return garbage value before it is initialized in cpu_init() called by setup_arch, so accessing percpu variable before setup_arch may cause kernel hang. But generic __my_cpu_offset always returns zero before percpu area is brought up, and won't hang kernel. So the patch tries to clear __my_cpu_offset on boot CPU early to avoid boot hang. At least now percpu variable is accessed by lockdep before setup_arch(), and enabling CONFIG_LOCK_STAT or CONFIG_DEBUG_LOCKDEP can trigger kernel hang. Signed-off-by: Ming Lei <tom.leiming@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> (cherry picked from commit 9394c1c65e61eb6f4c1c99f342b49e451ec337b6)
2014-04-01ARM: 7811/1: locks: use early clobber in arch_spin_trylockWill Deacon
commit afa31d8eb86fc2f25083e675d57ac8173a98f999 upstream. The res variable is written before we've finished with the input operands (namely the lock address), so ensure that we mark it as `early clobber' to avoid unintended register sharing. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Wang Weidong <wangweidong1@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-01ARM: 7812/1: rwlocks: retry trylock operation if strex fails on free lockWill Deacon
commit 00efaa0250939dc148e2d3104fb3c18395d24a2d upstream. Commit 15e7e5c1ebf5 ("ARM: 7749/1: spinlock: retry trylock operation if strex fails on free lock") modifying our arch_spin_trylock to retry the acquisition if the lock appeared uncontended, but the strex failed. This patch does the same for rwlocks, which were missed by the original patch. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Li Zefan <lizefan@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-01ARM: 7749/1: spinlock: retry trylock operation if strex fails on free lockWill Deacon
commit 15e7e5c1ebf556cd620c9b091e121091ac760f6d upstream. An exclusive store instruction may fail for reasons other than lock contention (e.g. a cache eviction during the critical section) so, in line with other architectures using similar exclusive instructions (alpha, mips, powerpc), retry the trylock operation if the lock appears to be free but the strex reported failure. Reported-by: Tony Thompson <anthony.thompson@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Li Zefan <lizefan@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-01ARM: 7957/1: add DSB after icache flush in __flush_icache_all()Vinayak Kale
commit 39544ac9df20f73e49fc6b9ac19ff533388c82c0 upstream. Add DSB after icache flush to complete the cache maintenance operation. Signed-off-by: Vinayak Kale <vkale@apm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-01ARM: 7953/1: mm: ensure TLB invalidation is complete before enabling MMUWill Deacon
commit bae0ca2bc550d1ec6a118fb8f2696f18c4da3d8e upstream. During __v{6,7}_setup, we invalidate the TLBs since we are about to enable the MMU on return to head.S. Unfortunately, without a subsequent dsb instruction, the invalidation is not guaranteed to have completed by the time we write to the sctlr, potentially exposing us to junk/stale translations cached in the TLB. This patch reworks the init functions so that the dsb used to ensure completion of cache/predictor maintenance is also used to ensure completion of the TLB invalidation. Reported-by: Albin Tonnerre <Albin.Tonnerre@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-01ENGR00306309 ARM:imx:imx6qdl: Fix procedure to switch the parent of LDB_DI_CLKRanjani Vaidyanathan
Due to incorrect placement of the clock gate cell in the ldb_di[x]_clk tree, the glitchy parent mux of ldb_di[x]_clk can cause a glitch to enter the ldb_di_ipu_div divider. If the divider gets locked up, no ldb_di[x]_clk is generated, and the LVDS display will hang when the ipu_di_clk is sourced from ldb_di_clk. To fix the problem, both the new and current parent of the ldb_di_clk should be disabled before the switch. This patch ensures that correct steps are followed when ldb_di_clk parent is switched in the beginning of boot. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-04-01ENGR00306276: iMX6: Add workaround for ARM errata 761320 and 794072Nitin Garg
These are Category B, hence workaround is essential. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
2014-04-01ENGR00306257 [#1027]fix system hang up issue caused by GPURichard Liu
This issue happens when multiple thread is trying to idle GPU at the same time, root cause is some wrong logic related with powerMutex which cause cpu still access GPU AHB register after GPU is suspend(clock off), that cause the bus lockup and make the whole system hang. Signed-off-by: Richard Liu <r66033@freescale.com> Acked-by: Jason Liu (cherry picked from commit d48e52700c4177e94695cdbdb480cb38a88a5ddc)
2014-03-27ENGR00305624-2 ASoC: imx-hdmi-dma: Correct the appl pointerNicolin Chen
We might not be able to get appl_ptr, so we estimated it by using hw_ptr, while the distance between then should not be 2 * priv->period_bytes initially but 8 * priv->period_bytes as we pri-filled one entire buffer size at the beginning. The driver's memory access might be overlapped with ALSA's buffer updating. So this patch fixes this inaccurate distance. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
2014-03-27ENGR00305624-1 ASoC: imx-hdmi-dma: Use neon data copy functionNicolin Chen
Use neon data copy function as default to improve data copy performance so that we can prevent some noise issue happening to HDMI audio due to the performance issue. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
2014-03-27ENGR00302036-3 gpu:gpu2d may cause bus hang in some corner caseLoren Huang
Vivante patch name: cl17466.17776.rls.lockup.2dhang(clear.blit) -Updated the outstanding request limit to 12. -Refined the 2D chip feature check. -Refine the 2D cache flush operation (avoid FE and PE access memory through the same port). -Enable cache flush for filterblt. -Dynamic enabling SPLIT_RECT by checking chip feature(disable for us) -Use brush stretch blt for clear operation. Date: Mar 26, 2014 Signed-off-by: Loren Huang <b02279@freescale.com> Acked-by: Shawn Guo
2014-03-27ENGR00303820 [#887] refine physical address check for external memoryXianzhong
2G above address will cause system reboot and fixed in original patch, error check code is added based on the original logic. Signed-off-by: Xianzhong <b07117@freescale.com> Acked-by: Jason Liu (cherry picked from commit 7d85c98bf781eb047c2000bd82ea7559c24a2446) (cherry picked from commit 04911cf737a4a40e7914ad94fd58bf92dcfa4a92)
2014-03-27ENGR00305465 MXC IPUv3 fb: Fix permissions of fsl_disp_property sysfs entryJulien Olivain
Set the correct permissions of the fsl_disp_property sysfs entry. Acked-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Julien Olivain <julien.olivain@freescale.com> (cherry picked from commit 9db2d982c90b6edb3dfebe03a68f50f381bb99bb)
2014-03-25ENGR00304914-1 ASoC: imx-hdmi-dma: Limit period size for 6DQNicolin Chen
The HDMI IP in i.MX6DQ has a bug that it limits the dma period size within 8K. Patch 'ENGR00300188-1 ASoC: imx-hdmi-dma: Double the buffer and period sizes' doubled the period size which works great with Dual Lite but broke the HDMI audio function on DQ. Thus fix it for 6DQ case. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
2014-03-20ENGR00303200 [IPU Split] - Vertical line in downsaled image with ratio less 2Oliver Brown
The optimal resize ratio should be used if the downscaler is not needed. This will fix a vertical line in the center for some scaling ratios. Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
2014-03-18ENGR00303890-3 usb: chipidea: imx: enable host quirk for imx6slPeter Chen
For HSIC operation at imx6sl, it needs host quirk too. Signed-off-by: Peter Chen <peter.chen@freescale.com>
2014-03-18ENGR00303890-2 usb: chipidea: imx: rename host quirk flag to reflect its ↵Peter Chen
real meaning This flag is not only used for mxs phy's bug, but also for speical routine for other imx host operations. Signed-off-by: Peter Chen <peter.chen@freescale.com>
2014-03-18ENGR00303890-1 Revert "usb: chipidea: put hw_phymode_configure before ↵Peter Chen
ci_usb_phy_init" This reverts commit 6cf1375d32049b7d852131d232ec97e76535a2e0 in order to avoid system hang access portsc without PHY clock. See: http://marc.info/?l=linux-arm-kernel&m=139350618732108&w=2 Signed-off-by: Peter Chen <peter.chen@freescale.com>
2014-03-17ENGR00303663 mxc v4l2 capture: Don't return error if we cannot get mipi csi2Liu Ying
The mipi csi2 code is ugly present in the capture pipeline setup/disable routions with '#ifdef CONFIG_MXC_MIPI_CSI2/#endif' protected. Whenever it finds mipi_csi2_info is not gotten correctly, it will return error to callers. This breaks the normally routines in which mipi csi2 is not used and mipi csi2 driver is disabled in its devicetree node(but with the Kconfig CONFIG_MXC_MIPI_CSI2 defined). A real example is the capture feature on the MX6 Sabreauto platforms. We have only parallel CSI input on it and the mipi csi2 driver is disabled in its devicetree node but with the Kconfig CONFIG_MXC_MIPI_CSI2 defined. So, a reasonable choice at present is not to return error if mipi_csi2_info cannot be gotten, though we could eventually re-organize the capture code for a better total solution in the future. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit 8133b7fd26e8b068fa8ab9cd62eae090c76080be)
2014-03-17ENGR00303308 hdmi:update default video mode setting required by xserverSandor Yu
xserver will read default video mode in command line by sysfs node /sys/class/graphics/fb0/mode, but the sysfs node is not initialized when system bootup without hdmi cable plugin or frame buffer register in blank state. Fixed: - Remove unused previous_mode - Add default_mode, initialize in disp_init function. - Initialize fbi->mode in disp_init function and hdmi_setup function. Signed-off-by: Sandor Yu <R01008@freescale.com>
2014-03-17ENGR00243315-4 MXC V4L2 Capture:Improve debug info for s_stdLiu Ying
commit f8e1a3bb62eecf93a31a51c4dbe08a0214fa1d57 introduced an annoying kernel log by changing a pure debug info to error level. This patch reverts that change. Conflicts: drivers/media/video/mxc/capture/mxc_v4l2_capture.c Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit b635fadfdff01d0f6112956ac903d80c62fd648b)
2014-03-17ENGR00243315-3 MXC V4L2 Capture:Remove unnecessary mclk settingLiu Ying
commit f8e1a3bb62eecf93a31a51c4dbe08a0214fa1d57 added a hard coding for csi_parma.mclk setting to 27MHz. The comment added by that commit is totally wrong by telling that csi_param.mclk would be a kind of 'pixel clock' set in 'csi_data_dest' register. This patch removes the unnecessary mclk setting for csi_param.mclk variable, since it is only valid for CSI test mode. Conflicts: drivers/media/video/mxc/capture/mxc_v4l2_capture.c Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit bb5afd554c50b639f1e1b94481b24f35ae8c4dc5)
2014-03-17ENGR00243315-2 IPUv3 CSI:Remove test mode clock settingLiu Ying
This patch removes test mode clock setting in function ipu_csi_init_interface(), since the setting is only necessary for function _ipu_csi_set_test_generator(). This unnecessary setting is added wrongly by commit f8e1a3bb62eecf93a31a51c4dbe08a0214fa1d57. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit 0f395a7aecfd2845df384c7a5a0045c86c3a2e20)
2014-03-17ENGR00243315-1 IPUv3 CSI:Correct CCIR code1/2 for PAL and NTSCLiu Ying
We reversed CCIR code1/2 setting before, which may brings captured frame quality issue(jaggy edge can be seen). This patch revert that change. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit a4c2228f5428af02b9be87114d096340f9b58083)
2014-03-17ENGR00298127-2 ARM: dtsi: imx6qdl sabreauto: Disable mipi csiLiu Ying
As the sabreauto CPU board schematics mentions, the MIPI connector isn't mechanically compatible with Freescale MIPI display and camera board, then we have no way to support MIPI features currently on this platform. So, let's disable MIPI CSI. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit 453d409281228429270b9f294728e5cad1c63ee0)
2014-03-17ENGR00298127-1 ARM: dtsi: imx6qdl sabreauto: Remove v4l2_cap_1 nodeLiu Ying
As the sabreauto CPU board schematics mentions, the MIPI connector isn't mechanically compatible with Freescale MIPI display and camera board, then we have only the parallel CSI video input that is supported by the v4l2_cap_0 node. So, let's remove the orphan one - v4l2_cap_1. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit 1396bc28eac7e968e278a9ce36cdc7a44b0417bd)
2014-03-14ENGR00302869-2 ARM: imx: imx6qdl: enable cfg_clk to make MIPI CSI2 workRobby Cai
The following error was reported. ----------------------------------------------------------- root@imx6qdlsolo:~# /unit_tests/mxc_v4l2_capture.out -d /dev/video1 1.yuv in_width = 176, in_height = 144 out_width = 176, out_height = 144 top = 0, left = 0 mipi csi2 can not receive sensor clk! sensor chip is ov5640_mipi_camera sensor supported frame size: 640x480 320x240 720x480 720x576 1280x720 1920x1080 2592x1944 176x144 1024x768 sensor frame format: UYVY sensor frame format: UYVY sensor frame format: UYVY sensor frame format: UYVY sensor frame format: UYVY sensor frame format: UYVY sensor frame format: UYVY sensor frame format: UYVY sensor frame format: UYVY mipi csi2 can not receive sensor clk! mxc_v4l2_s_param: vidioc_int_s_parm returned an error -1 VIDIOC_S_PARM failed get format failed ----------------------------------------------------------- Root cause analysis: It only happens when HDMI is not used/enabled. There is a clock named video_27m which are needed by HDMI (as isfrclk's parent) and MIPI-CSI2 (as cfg_clk's parent). MIPI-CSI2 driver is lack of enabling this clock before start to work and only happen to work when HDMI driver enables this clock. Signed-off-by: Robby Cai <R63905@freescale.com> (cherry picked from commit a6bbc7d56f261ab84e04071487264c6a519df758)
2014-03-14ENGR00302869-1 ARM: dts: imx6qdl: add cfg_clk for MIPI CSI2Robby Cai
MIPI CSI2 depends on this clock to work. This patch also updates the binding document. Signed-off-by: Robby Cai <R63905@freescale.com> (cherry picked from commit 67e7963f6f7ddb6c001bb34c6af71f2330fd0e3f)
2014-03-12ENGR00302531 Noise come out after change the HDMI resolution when video pauseShengjiu Wang
After change the resolution, the blank state will be changed, the audio will be triggered to start. which didn't care about the audio is running or not before changing the resolution. Add hdmi_abort_state for this special case. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
2014-03-11ENGR00300188-2 ASoC: imx-hdmi-dma: Clear offset in the trigger initNicolin Chen
The offset reflects the current position of DMA access in the ALSA ring buffer. So we should clear it before re-start DMA engine becasue the DMA access should re-start its job from the 0 position. If we don't do this, the driver might get a wrong idea about current position of DMA access. Thus fix it. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> (cherry picked from commit 8f265543ffda0a19e3f469967a7d61d8b344f080)
2014-03-11ENGR00300188-1 ASoC: imx-hdmi-dma: Double the buffer and period sizesNicolin Chen
We found HDMI Audio has a performance issue when playback 8 channels 192KHz files, CPU might lag its interrupt responsing while SDMA continues updating HDMI internal AHB DMA's address and restarting AHB DMA, which resulted the noise when AHB DMA access overlaps with the data copy procedures in this driver. Thus we here double the buffer size and period size of HDMI Audio to chop the CPU interrupt to its half in the same span of time so that we can keep the data copy procedures safe and provent it from overlapping access with AHB DMA. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> (cherry picked from commit 04af1a351e016f52276ae002fd9f64b6b2962168)
2014-03-06ENGR00299939-3 USB: imx6x: Add dummy LDO2p5 regulator for VBUS wakeupRanjani Vaidyanathan
LDO2p5 cannot be disabled in low power idle mode when the USB driver enables VBUS wakeup. To identify when LDO2p5 can be disabled add a dummy regulator that the USB driver will enable when VBUS wakeup is required. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
2014-03-05ENGR00299939-2 ARM: imx6sl: Add dummy LDO2p5 regulator to support VBUS wakeupRanjani Vaidyanathan
LDO2p5 cannot be disabled in low power idle mode when the USB driver enables VBUS wakeup. To identify when LDO2p5 can be disabled add a dummy regulator that the USB driver will enable when VBUS wakeup is required. This patch ensures that the low power idle code checks the status of the dummy ldo2p5 regulator before disabling LDO2p5. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
2014-03-05ENGR00299939-1 ARM: dts: imx6sl:Add dummy LDO2p5 regulator to support vbus ↵Ranjani Vaidyanathan
wakeup LDO2p5 cannot be disabled in low power idle mode when the USB driver enables VBUS wakeup. To identify when LDO2p5 can be disabled add a dummy regulator that the USB driver will enable when VBUS wakeup is required. This patch adds the dummy regulator to the dts files. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
2014-02-27ENGR00301095 gpu:gpu hang when dma memory is used upLoren Huang
When dma zone memory used up, gckOS_AllocateNonPagedMemory() will try to free non paged memory cache and allocate again. Such operation will cause twice memory mutex request and cause gpu driver hang. The solution is free the memory mutex at first before trying to free non paged memory cache. Date: Feb 27, 2014 Signed-off-by: Loren Huang <b02279@freescale.com> Acked-by: Shawn Guo (cherry picked from commit 79ed8edd23f990f6c1429154c2ee773c83bfd72e)
2014-02-20ENGR00292341 imx6sl hwrngDan Douglass
Add hwrng support for i.MX6SL. 1. Add RNG driver. This driver originated as fsl-rngc.c. It has been modified to support device tree. The name has been changed since it supports both b and c variants of RNG. 2. Added clock and compatible info to the device tree data. 3. Added the entry in the options in the Kconfig for hwrng. Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
2014-02-19ENGR00290659 IPUv3: Fix a flashing vert. line when downsizing 1080i to 300x400.Oliver Brown
When split mode deinterlacing is the ipu_calc_stripes_sizes() was failing due to an unnecessary test. Added logic to use the maximal_stripe_width only if the flag parameter has the bit 0 clear for not equal stripe sizes. Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
2014-02-20ENGR00299600 hdmi:yocto gui can not show to some TV on ard boardSandor Yu
For i.MX6 ARD board, the board not support read EDID from TV, so HDMI driver will create a default support mode list when system bootup. Because yocto xserver can not get video mode information from framebuffer now, and xserver will set default video mode XGA to framebuffer, but XGA mode is not support by hdmi. Remove XGA and SXGA from default support list. HDMI driver will find a nearest match video mode in support list. It is VGA mode. HDMI support VGA mode well. Issue is fixed. Signed-off-by: Sandor Yu <R01008@freescale.com>
2014-02-19ENGR00299756-5 ASoC: fsl_esai: Add default init for ESAI after probe()Nicolin Chen
This patch extracts the register init code for ESAI along with the default slot number which is more common to I2S and LEFT_J mode. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> (cherry picked from commit ad9c7ab4ff75488c0cc44bcc5d87af2d5d1139cf)
2014-02-19ENGR00299756-4 ASoC: imx-cs42888: Use ESAI LEFT_J master modeNicolin Chen
This patch sets ESAI as LEFT_J format master so as to let ESAI provide bit clock and frame clock for stability. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> (cherry picked from commit 38df16f71c95e2aa8e0b4c1ddd2ed7ec2c4fef4b)
2014-02-19ENGR00299756-3 ARM: imx6q: Add the clock route from external OSC to ESAI clockNicolin Chen
This patch mainly adds the clock route from external 24.576MHz OSC to internal ESAI clock via analog clock2 PADs on the SoC and pll4 so that ESAI can get an entirely synchronous clock source against CS42888. [ 1, We found if using pll4 to generate a 24.576MHz from inernal 24.0MHz OSC, we would get noise during the audio playback via ESAI->CS42888 even though this generated clock's rate is equal to the external one statistically. It might be resulted from the tiny difference between two clock source, which might be crucial to the sensitive CODEC we use -- CS42888. So we here apply the old 3.0.35 way to feed ESAI the same clock source as CS42888. 2, Ideally, we should use bypass mode for pll4 since we only need to get the raw rate (24.576MHz) while currently bypass mode in clk-pllv3.c isn't entirely supported: The clock rate would be fixed to 24.0MHz if setting to bypass, which would cause child clock get an incorrect rate and the driver who uses the child clock fail to derive a needed clock rate, and it might be dangerous to involve the clk-pllv3.c driver to this fix. Thus we here apply 3.0.35 way provisionally. ] Expected result: anaclk2 0 1 24576000 lvds2_in 0 1 24576000 pll4_sel 0 1 24576000 pll4_audio 0 1 786432000 pll4_post_div 0 1 786432000 pll4_audio_div 0 1 786432000 esai_sel 0 1 786432000 esai_pred 0 1 98304000 esai_podf 0 1 24576000 esai 0 1 24576000 Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> (cherry picked from commit 49584be724d4d9c7a753d2b981b3932d8d871eb4)
2014-02-19ENGR00299756-2 ARM: imx6q: Add missing lvds2 clock to the clock treeNicolin Chen
We actually have lvds2 (analog clock2), an I/O clock like lvds1, in the SoC. And this lvds2, along with lvds1, can be used to provide external clock source to the internal pll, such as pll4_audio and pll5_video. So This patch mainly adds the lvds2 to the clock tree and fix its relationship with pll4 accordingly. [ To reduce the risk from code changing. This patch only takes care of pll4 related part. We might later need to add the relationship with pll5 too. ] Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> (cherry picked from commit 5b74b6b26e4b44d265090fc6ad15b15ccb7b5cff)
2014-02-19ENGR00299756-1 ASoC: fsl_esai: Add missing clock enabler to ASoC interfacesNicolin Chen
All of these functions might be called before we enable the core clock in the startup() by set_bias_level() or late_probe() in machine driver for example. To make it safe, we here add pair of clock en/disabling to each function. Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> (cherry picked from commit e6df36df2bc8062f3d1c0a19d18acc843a77619d)
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-28 23:54:23 +0000