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1) ESAI does not support 44.1Khz
2) need checking word width for asrc p2p mode
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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Reset reg variable before setting or it will set an unexpected wrong value.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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Change from u8 declaration in pxp_dma.h to __u8
Signed-off-by: Danny Nold <dannynold@freescale.com>
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- Add support for 8-bit grayscale colormaps to be used
during EPDC update processing
- Add support in PxP for programming of colormaps
Signed-off-by: Danny Nold <dannynold@freescale.com>
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there is hardware pin conflict between sii902x DET and egalax touch screen
on mx53 loco board. Request gpio during sii902x probe can fix this conflict
only when these two module not co-exist.
Signed-off-by: Jason Chen <b02280@freescale.com>
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there is hardware pin conflict between sii902x DET and egalax touch screen
on mx53 loco board. Request gpio during sii902x probe can fix this conflict
only when these two module not co-exist.
Signed-off-by: Jason Chen <b02280@freescale.com>
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- Move the majority of code from the IRQ handler routine into a workqueue
routine. This should improve system interrupt latency.
- Change the spin_lock protecting EPDC queues into a mutex and change all
associated spin_lock calls into mutex calls.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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When setup irq is received, the status phase of the transfer is primed
on ep0 before the data phase. The usb requests are added to the list
of transfer descriptors (maintained by driver) in reverse of their
expected completion order. Completion order is data followed by status,
however the list of tds contains status followed by data.
Upon completion of the data request, the irq handler proceeds to check
the 1st td in the list -- the status request. In full speed mode,
the status phase has not yet completed at this time, so the td's
ACTIVE bit is still set. This leads irq handler to ignore the completion
interrupt without checking the actual td for the data request that caused
the interrupt.
In high speed mode, this issue does not bear itself out because the status
request also completes by the time the irq handler goes to process the data
completion interrupt.
The simple fix for this issue is to prime the status request AFTER the data
request, so that the list of tds maintained by the driver contains the tds
in the order of expected completion.
Signed-off-by: Anish Trivedi <anish@freescale.com>
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Do not deal with un-enabled device interrupt
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Because VUSB is supply by SWBST , we shouldn't off SWBST, otherwise
VUSB will not kept in 3.3V , so there is no normal wakeup signal
produced when USB device plug in or out after system go into stop
mode.
Signed-off-by: Robin Gong <B38343@freescale.com>
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powerdown DAC,LINE_OUT,HP in shutdown
Signed-off-by: b02247 <b02247@freescale.com>
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1. Add DDR self-refresh mode and float pin operation when system idle
For audio playback use case on android r10.3, it can save 10mA@1.54V
about 15mW on DDRIO+ memory power, and 6.6mA@2.5V -16.5mW on VDD_REG
It can reduce more memory power consumption if cpu idle time is longer
2. remove the L1/L2 cache operation during suspend for mx53
The L1/L2 cache are powered by VDDA/VDDAL1 and they should be supplied
according to iMX53 datasheet, there is also no EMPG on MX53,
so it can be removed to improve system performance and power.
3. remap the suspend_iram_base as MT_MEMORY_NONCACHED instead of MT_HIGH_VECTORS
If the IRAM page is marked as Cacheable, the ARM cache controller will
attempt to flush dirty cache lines to DDR, so it can fill those lines with
IRAM instruction code. The problem is that the DDR is in self-refresh mode
and HighZ DDR IO PADs during system idle or suspend, so any DDR access
causes the ARM MPU subsystem to hang.
It needs to cherry-pick two patches(5a4aeb9f6,7c8d972d8) from community.
4. Add DDR self-refresh mode and float pin operation for mx53 ARD board,
and mx53 QS/Ripley board
This patch can resovle ramdom suspend/resume issue, since the early code
didn't consider the TLB missing case during suspend. It needs to save all
the M4IF/IO MUX registers firstly to make sure the page table entried into
TLB, and then enter DDR self-refresh mode.
Signed-off-by: Wayne Zou <b36644@freescale.com>
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fix eSDHC errata 'DDTS ENGcm03648'
if it's command with busy, we should poll data0 signal
until it's high which means bus is idle.
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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The commit f1a2481c0 sets up the default flags for MT_MEMORY and
MT_MEMORY_NONCACHED memory types. L_PTE_USER flag is wrongly
set as default for these entries so remove it. Also adding
the 'L_PTE_WRITE' flag so that these pages become read-write
instead of just being read-only
[this stops them being exposed to userspace, which is the main
concern here --rmk]
Reported-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch populates the L1 entries for MT_MEMORY and MT_MEMORY_NONCACHED
types so that at boot-up, we can map memories outside system memory
at page level granularity
Previously the mapping was limiting to section level, which creates
unnecessary additional mapping for which physical memory may not
present. On the newer ARM with speculation, this is dangerous and can
result in untraceable aborts.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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- When usb cable is plugged out, the B_SESSION_VALID interrupt is disabled to
avoid usb disconection work queue interrupting. After usb disconection work
queue task is finished, re-enable it to generate interrupt.
Signed-off-by: Tony Liu <b08287@freescale.com>
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-remove all the un-necessary operation in suspend_irq
-remove delay work queue
-fix review comments
Signed-off-by: Tony Liu <b08287@freescale.com>
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a counter used in sdhci_enable_sdio_irq function is not correct.
calling the function with enable flag will skip enabling the irq if it
follows two continuous calls with disable flag because of the counter.
to resolve this problem, simply set the counter to 1 or 0 instead of counting.
this bug is reported by a customer.
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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[ARM] Do not call flush_cache_user_range with mmap_sem held
We can't be holding the mmap_sem while calling flush_cache_user_range
because the flush can fault. If we fault on a user address, the
page fault handler will try to take mmap_sem again. Since both places
acquire the read lock, most of the time it succeeds. However, if another
thread tries to acquire the write lock on the mmap_sem (e.g. mmap) in
between the call to flush_cache_user_range and the fault, the down_read
in do_page_fault will deadlock.
Also, since we really can't be holding the mmap_sem while calling
flush_cache_user_range AND vma is actually unused by the flush itself,
get rid of vma as an argument.
Change-Id: If55409bde41ad1060fa4fe7cbd4ac530d4d9a106
Signed-off-by: Dima Zavin <dima@android.com>
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in board_init ,kernel will read the system_rev TAG from uboot
and configure the right interrupt gpio
Signed-off-by: Robin Gong <B38343@freescale.com>
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FG pos need be reset to 0 when channel disable, but it will lost old setting.
Signed-off-by: Jason Chen <b02280@freescale.com>
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For split mode, if using vf/enc task, the display is not correct.
Signed-off-by: Jason Chen <b02280@freescale.com>
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One issue was found in split mode: For input 1024x600, output 1360x768,
after stripe calculation, input width and input column are not right.
This patch fix this issue.
Signed-off-by: Jason Chen <b02280@freescale.com>
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The standard EHCI design will clear RS bit after usb bus goes to
suspend, but it causes some remote wakeup issues, like remote-wakeup
featured device will be reset after resuming.
According to usb 2.0 spec, the SOF need to be sent out within 3ms
after resume signal ends, or device may consider host disconnects
with device. Freescale's USB Controller (Chipidea's core) will ends
up resume signal automatically within 21ms after it recevices remote
wakeup signal. So, if software does not set RS bit within 21ms after
it recevices remote wakeup signal, the problem described above will
be occurred.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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1. If change defconfig and only build in mc34708 dirver,
the following error is reported:
undefined reference to `mc13892_alloc_data'
undefined reference to `mc13892_init_registers'
undefined reference to `mc13892_get_revision'
This patch is to fix above compiling error.
2. Add mc34708 dependency in Kconfig
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Driver part
Please follow below load sequence to use OTG
- fsl_otg_arc
- ehci-hcd
- arcotg_udc
Besides, in order to match i.mx53 release windows, it changes some
common code, there will be a better solution at 2.6.38 in future
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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MSL part
Follow below load sequence to use OTG
- fsl_otg_arc
- ehci-hcd
- arcotg_udc
Besides, in order to match i.mx53 release windows, it changes some
common code, there will be a better solution at 2.6.38 in future
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Merge this patch for SR 1-775080061.
The error is the system can find the CAN bus, but cannot communicate
physically.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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Use CONFIG_MXS_DMA_ENGINE flag to control mxs dma engine
code
Signed-off-by: Lily Zhang <r58066@freescale.com>
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Set this clock closed by default, and open it when it is needed.
Signed-off-by: Yuxi Sun <b36102@freescale.com>
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enable coin cell battery charger
Signed-off-by: Wayne Zou <b36644@freescale.com>
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At armv7 SoC, the dma_alloc_coherent returns non-cachable, but
bufferable region, so the driver needs to drain write buffer by
itself, if the controller needs to visit dma buffer immediately
after cpu writes
There is a discussion for this armv7 change:
http://marc.info/?t=127918539100004&r=1&w=2
For this issue, the next dtd pointer is invalid sometimes, the reason
is the region which is used to store dtd is dma buffer, so the data may
not be written to memory when the controller visit this data.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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- The spin_lock is at interrupt handler, so all code routines
using at interrupt handler are forbidden to hold spin_lock again
- Move the code which needs to be protected by spin_lock to workqueue,
and it will be called when workqueue is scheduled.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Below bugs are fixes:
- the device is invalid when usb device at otg port
The reason is udc->suspended is incorrect when otg as host mode
during boot up
- The disconnect can't be detected if usb is online when booting up
The reason is the vbus interrupt enable is cleared by otg switch work
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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wait_event_interruptible_timeout function could be signal
return, so we need add ERESTARTSYS return value to let libc
retry sys call.
Signed-off-by: Jason Chen <b02280@freescale.com>
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1) do not always open clock for sdio card until sdio driver loaded
2) WiFi should disable host clock for host when unloaded because host
has no sense when sdio driver unloadded.
Noted the clock disable should at the end of SDIO driver remove callback.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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Add Wolfson PMIC WM8325 driver support
Signed-off-by: Wayne Zou <b36644@freescale.com>
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Add cea extend revision 1 and 2 support.
Signed-off-by: Jason Chen <b02280@freescale.com>
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- Fixed bug in how new waveform set is copied into EPDC driver internal
copy of waveform modes.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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During the platform boot up, during the platform does DA9053 Read/Write
operation, it writes slave address and wait for ACK . Instead of ACK
PMIC sends NAK. A workaround fix is provided as a part of retries
fix I2C NAK for very first access.
Also fix a bug when the system fails to start after software shutdown.
Signed-off-by: Wayne Zou <b36644@freescale.com>
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Changes Made
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1) On Pen UP the TSI threads are stopped and
On Pen DOWN TSI threads are started
2) Removed TSI thread creation from Probe,
instead creating the TSI threads when PEN DOWN
Expected Output
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1) TSI threads to stop either when system is suspended or,
there is no touch event.Thus conserving power during system
suspend, idle and no touch event.
2) TSI threads to start only on touch event and not when system is resumed.
3) On system Start/Restart TSI threads will not be created and started till
the touch detection.
Signed-off-by: Wayne Zou <b36644@freescale.com>
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Fix asrc build error introduced by:
'be75f376017a04b55cc9f4b3d1c3f2836deb9e47'
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
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Asrc not works with ssi, it partly caused by ASRC driver not correctly
handle ssi input clock and data format.
SSI frame clock counting by word, when data format is 16bit-LE,
two channel data combine to one word, and frame rate used by
ASRC should take this into account.
And more, unlike Mx3x, Mx5x should set input and output data format
correctly in its ASRMCR1x register.
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
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The following case not works in mx53:
memory --> asrc --> ssi
It is partly caused by asrc --> ssi using per_2_per sdma script
to transfer data. And this script not works in sdma driver.
In the per_2_per script, two sdma events trigger one channel, the
watermark level setting different from ordinary sdma script, we need
to set two watermark levels and map each watermark to event one-by-one.
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
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When kernel_preempt not enable in configure, system bootup hangs
in sdma initialization.
This is caused by sdma initialization waiting for channel0 complete loading
script in queue, and arch_idle happens with action to disable some clocks,
if DDR clock disabled, script loading will failed and SoC hangs.
Solve it by make sure DDR clock is enabled during sdma initialization.
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
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1) Current blank information should be unblank if
we return back from mxcfb_set_par() function
successfully.
2) Remove bypassing the suspend handling for
overlay framebuffer for Android.
3) Synchronize fb unblanking operation bewteen
Android early suspend and mxcfb_set_par() to
avoid fb being unblanked after early suspend
is done, as Android early suspend doesn't
guarantee fb cannot be operated after early
suspend.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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1) Fix race condition issue for enable/disable ipu clk.
2) Remove uninitializing MEM_FG_SYNC channel when
suspend for Android.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
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Found the driver will leave i2c package dump message in kernel debug
level, it create too much noice, this should be deleted.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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Add vmalloced memory for multi-instances shared memory, vpu lib
will call mmap for accessing the memory.
VPU_IOC_GET_SHARE_MEM ioctl is still reserved for some time since
vpu lib still uses it for mx5x now. Will remove it after mx5x changes
to this new added memory later.
Signed-off-by: Sammy He <r62914@freescale.com>
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Add new VPU_IOC_REQ_VSHARE_MEM ioctl to request vmalloced share memory.
Signed-off-by: Sammy He <r62914@freescale.com>
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