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2013-10-23arm: tegra: roth: Add pwm gpiodaily-2013.10.29.0_rel-roth-r2-partnerdaily-2013.10.28.2_rel-roth-r2-partnerdaily-2013.10.28.1_rel-roth-r2-partnerAnshul Jain
Add pwm gpio in fan data, so it can be accessed by pwm_fan driver. Bug 1388303 Change-Id: I407166aac44473ec8ceaf4f8acee18b02db18d7f Signed-off-by: Anshul Jain <anshulj@nvidia.com> Reviewed-on: http://git-master/r/302592 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>
2013-10-23thermal: pwm_fan: toggle gpio in suspend/resumeAnshul Jain
On suspend, this change sets the gpio high. On suspend: free pwm request gpio set gpio high On resume: free gpio request pwm set pwm Bug 1388303 Change-Id: I6905e4217dd170801d84ec98713067e5c2a53abf Signed-off-by: Anshul Jain <anshulj@nvidia.com> Reviewed-on: http://git-master/r/302591 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>
2013-10-17misc: nct1008: Temperature bound checkAnshul Jain
This change does bound checking of temperature reads from NCT device, this is done to return error when NCT is not ready and TF tries to read temperture. Bug 1388303 Change-Id: I642ecb46feb39469c0b3b33ea513604c7ff4a893 Signed-off-by: Anshul Jain <anshulj@nvidia.com> Reviewed-on: http://git-master/r/300670 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> GVS: Gerrit_Virtual_Submit
2013-10-17thermal: pwm-fan: lock during sysfs writesAnshul Jain
This change locks the whole sysfs function to ensure atomicity. Also, more logs are added for better visibility during suspend and resume. Bug 1388303 Change-Id: Iadf8bdc4309575ec42a1946ecfb28eb7654440e3 Signed-off-by: Anshul Jain <anshulj@nvidia.com> Reviewed-on: http://git-master/r/299756 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> GVS: Gerrit_Virtual_Submit
2013-10-17misc: therm_fan_est: Fix for suspend/resume raceAnshul Jain
Now trip index will be nullified after cancelling the work. Bug 1388303 Change-Id: Icda3e232e98b4f504c1bebcd340b49749d1ebbc3 Signed-off-by: Anshul Jain <anshulj@nvidia.com> Reviewed-on: http://git-master/r/299755 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> GVS: Gerrit_Virtual_Submit
2013-10-17misc: nct1008: Suspend LockAnshul Jain
Suspend lock is required to serialize suspend/resume, get_temp from thermal framework and work queue. Bug 1388303 Change-Id: Ib3e8873e3d2560aacd74ba02c726ec9fdc73e660 Signed-off-by: Anshul Jain <anshulj@nvidia.com> Reviewed-on: http://git-master/r/299754 Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com>
2013-10-17misc: bluedroid_pm: check BT TX and RX status before wake_lock releaseNagarjuna Kristam
bluedroid stack, updates only TX busy status through proc interface. When BT HID/PAN-U connection are active, high probability of data is RX only and no activity on Tx path. So, dis-allow suspend when either of BT TX or BT RX is active. Bug 1381466 Change-Id: Ib174b7d95d173c34e41ce393f93fda5fa204f217 Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> Reviewed-on: http://git-master/r/299894 GVS: Gerrit_Virtual_Submit Tested-by: Todd Poynter <tpoynter@nvidia.com> Reviewed-by: Anshul Jain (SW) <anshulj@nvidia.com>
2013-10-15input: touch: radyium: avoid deadlockXiaohui Tao
Fix potential deadlock in driver Raydium drop does not fix the problem. We need to have this temporary fix to solve the problem. Bug 1384590 Change-Id: Ifcb56ba5db34b42af0b4d441659d7a5fdd869943 Signed-off-by: Xiaohui Tao <xtao@nvidia.com> Reviewed-on: http://git-master/r/289969 Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Robert Collins <rcollins@nvidia.com> Reviewed-by: Ankit Pashiney <apashiney@nvidia.com>
2013-10-15Revert "video: tegra: dc: check ext enabled before flip"Ankita Garg
This reverts commit 047024eda0ce5f88ccb402ec02b6d85cae3e208b. Bug 1386004 Change-Id: I7cde647f89f65a4b112c6c76a3b16d610fc03469 Signed-off-by: Ankita Garg <ankitag@nvidia.com> Reviewed-on: http://git-master/r/299639 Tested-by: Rakesh Iyer <riyer@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Ankit Pashiney <apashiney@nvidia.com>
2013-10-15input: touch: raydium: import for service busyXiaohui Tao
Limit the number of service busy printks inside touch driver for power saving purposes from v60.0 to v56.2. Bug 1288488 Change-Id: I66d4fad29b90cf5eddcbb9f068596378d24ae925 Signed-off-by: Xiaohui Tao <xtao@nvidia.com> Reviewed-on: http://git-master/r/299024 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-by: Robert Collins <rcollins@nvidia.com> Reviewed-by: Ankit Pashiney <apashiney@nvidia.com>
2013-10-10ARM: tegra: disable IKCONFIG and make modules built-inEric Miao
Bug 1343930 To be conform with CTS, we need to disable IKCONFIG and MODULES, and make existing modules all built-in. CONFIG_MODULES and relevant options are left untouched, these will be turned OFF if it's a user build. This option is still necessary for engineering build for out-of-tree modules and many test cases. Change-Id: Icd858d5d707e66d4d9499de8ad358d06bc4e35d2 Signed-off-by: Eric Miao <eric.miao@nvidia.com> Reviewed-on: http://git-master/r/281984 Reviewed-by: Eric Miao <emiao@nvidia.com> Tested-by: Eric Miao <emiao@nvidia.com> Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
2013-10-10misc: tegra-profiler: kprobes is no longer usedIgor Nabirushkin
Tegra Profiler: kprobes is no longer used Use callbacks from the scheduler instead of kprobes Bug 1343930 Change-Id: I67589dbe972cc5c853addfb6ed82c488529eed55 Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com> Reviewed-on: http://git-master/r/281941 Reviewed-by: Daniel Horowitz <dhorowitz@nvidia.com> Reviewed-by: Eric Miao <emiao@nvidia.com> Tested-by: Eric Miao <emiao@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
2013-10-10input: touch: raydium: release mutex in errorXiaohui Tao
The mutex needs to be released when there is an error inside the rm_tch_ts_send_signal. Bug 1384590 Change-Id: I269f1087724726c00eb31c8481dee3af577a2985 Signed-off-by: Xiaohui Tao <xtao@nvidia.com> Reviewed-on: http://git-master/r/282913 Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-by: Robert Collins <rcollins@nvidia.com> Reviewed-by: Ankit Pashiney <apashiney@nvidia.com> GVS: Gerrit_Virtual_Submit
2013-10-10input: misc: inv: prevent IRQ revivalSang-Hun Lee
Problem description: - nvi_work_function may revive IRQ which was disabled during suspend and shutdown Fix description: - Add a flag stop_workqueue which is set during suspend and shutdown - If the flag is set, make workqueue not revive the IRQ Bug 1361923 Change-Id: I498091602ef9c43b75c0a17d7fe0837624271959 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-on: http://git-master/r/284347 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Robert Collins <rcollins@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-10-09input: misc: inv: fix race in shutdown and suspendSang-Hun Lee
Problem description: - Write to shutdown flag is not mutex protected - nvi_work_func may be scheduled after shutdown or suspend - kfifo is being freed for shutdown, which could corrupt memory if there is a further access to kfifo by nvi_pm_exit and its function calls Fix description: - Encapsulate write to shutdown flag with a mutex, to ensure readers get valid information - Wait for nvi_work_func to complete during shutdown and suspend - Free kfifo only during remove Bug 1361923 Change-Id: I64dabfb21a289354e7f7c58ac408dc48bcff9267 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-on: http://git-master/r/283813 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-10-07mach-tegra: Enable LP0 wakeup on HDMI hotplug for board-roth.Todd Poynter
Set TEGRA_DC_OUT_HOTPLUG_WAKE_LP0 for roth_disp2_out which will arm the GPIO wakesource when set. Enable index WAKE4 / TEGRA_GPIO_PN7 (HDMI) as a wake source for board-roth. Bug 1367505. Change-Id: I4b4e3ca458243b3b27b316ac237264a0d323ff17 Signed-off-by: Todd Poynter <tpoynter@nvidia.com> Reviewed-on: http://git-master/r/281824 Reviewed-by: Dan Nolan <dnolan@nvidia.com> GVS: Gerrit_Virtual_Submit
2013-10-07input: misc: inv: reset gyro on an interrupt stormSang-Hun Lee
Problem description: - Sometimes gyro sends more interrupts than the system could handle - This locks up the system for a long time if the system is locked up at a low power cluster Fix description: - If gyro sends more interrupts than the specification, disable interrupt and schedule a power cycle of gyro Bug 1311053 Change-Id: Ib6a3eb2991702a4ca41657cfc57179e16ebcd11d Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-on: http://git-master/r/280083 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
2013-10-07input: misc: Fix self-testErik Lilliebjerg
- Fix self-test HW restore after test. - Fix register write failures due to PM cycle mode. Bug 1327608 Bug 1313284 Bug 1311053 Bug 1315609 Change-Id: I9b9fb1afc8b9a10309e0224e56813bc9e400598c Signed-off-by: Erik Lilliebjerg <elilliebjerg@nvidia.com> Reviewed-on: http://git-master/r/255171 (cherry picked from commit 029e3a6a8053e128c93b6bfc3850b74d5577ca66) Reviewed-on: http://git-master/r/280082 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
2013-10-07input: misc: sensor driversErik Lilliebjerg
- reduce suspend time for compass and pressure - fix MPU possible interrupt storm - fix MPU sample frequency overrun - fix MPU 9250 support for sw_rev > 2 HW - add BMP280 support to BMP180 pressure driver - optimize MPU FIFO timestamp algorithm - add compass self-test - add data interface Bug 1313284 Bug 1311053 Bug 1295128 Bug 1256470 Bug 1236893 Change-Id: I4ffa906c07ed1d07ad3b89aea9eb83fb153b765d Signed-off-by: Erik Lilliebjerg <elilliebjerg@nvidia.com> Reviewed-on: http://git-master/r/246132 (cherry picked from commit 8cdf5b9ccfb47477229bf2cbb37f5132e81ad39e) Reviewed-on: http://git-master/r/248192 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
2013-10-07video: tegra: dc: WAR of SHIFT_CLK_DIV update.Kevin Huang
Bug 1225291 Bug 1161019 Bug 1363029 Change-Id: I699e64a1f6464eeddae5275a55cd2b285badc698 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/195272 Reviewed-on: http://git-master/r/281537 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Jon Mayo <jmayo@nvidia.com> Tested-by: Rakesh Iyer <riyer@nvidia.com>
2013-10-07input: misc: mpu: Check suspend status before i2cXiaohui Tao
During suspend/resume period, it is possible that the i2c transfer still occurs after the power to the chip has already been cut. Add shutdown to regulator control in order to avoid timeout when anyone tries to send anything through the i2c bus when the chip has been removed power. Bug 1361923 Change-Id: I1cd37b56a7572955e1e8c29034d04c00c9c81e18 Signed-off-by: Xiaohui Tao <xtao@nvidia.com> Reviewed-on: http://git-master/r/281110 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Robert Collins <rcollins@nvidia.com> Reviewed-by: Ankit Pashiney <apashiney@nvidia.com> Tested-by: Robert Collins <rcollins@nvidia.com>
2013-10-04tegra: dc: hdmi: allow LP0 wakeup by hotplug GPIOAlexandre Courbot
Introduce a new TEGRA_DC_OUT_HOTPLUG_WAKE_LP0 flag which can be specified for DC controllers for which we want the HDMI hotplug GPIO to serve as a LP0 wake source. Bug 1345127 Change-Id: I9193be6ada4b0eca1c074c4b9a5888e3b0e49150 Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-on: http://git-master/r/266365 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Aaron Gamble <jgamble@nvidia.com> Reviewed-by: Prajakta Gudadhe <pgudadhe@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/281798 Reviewed-by: Todd Poynter <tpoynter@nvidia.com> Tested-by: Todd Poynter <tpoynter@nvidia.com> Reviewed-by: Kevin Bruckert <kbruckert@nvidia.com>
2013-10-04ARM: tegra: add wakeup sources tuning functionsAlexandre Courbot
Add tegra_set_wake_gpio() and tegra_set_wake_irq() functions that allow board files to customize wakeup sources. Wake sources are fixed and currently defined in wakeups-t11x.c. Defining custom wake sources for a given project is difficult and can only be done by: 1) Having compilation conditionals into wakeups-t11x.c to perform per-board modifications (as is done for Dalmore currently), or 2) Duplicating wakeups-t11x.c and all the code it contains and compiling the corresponding wakeups sources file for the board. Neither or these methods can scale, and both actually break the ability to boot the same kernel binary on different boards. This patch exports functions that the board init functions can use to modify the wakeup sources as they need, keeping board-specific changes into board-specific files. Change-Id: I2803e5a76f2fc7eaaa9bd343c904719b018357bd Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-on: http://git-master/r/267689 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/281795 Reviewed-by: Todd Poynter <tpoynter@nvidia.com> Tested-by: Todd Poynter <tpoynter@nvidia.com> Reviewed-by: Kevin Bruckert <kbruckert@nvidia.com>
2013-10-01bcmdhd: Define miracast modes 3 & 4Srinivas
Improve QoS for Grid2shield stream by turning off AMPDU aggregation on 11n AP's Mode 3 - disable AMPDU for all CS's Mode 4 - re-enable AMPDU except CS 5 & 7 Driver command MAXLINKSPEED added to distinguish 11n and non-11n AP's Bug 1375583 Change-Id: I36a6b2426ea53696fac54681fda38f91eabc8956 Signed-off-by: Srinivas <srinivasra@nvidia.com> Reviewed-on: http://git-master/r/279441 Reviewed-by: Steve Lin <stlin@nvidia.com> Reviewed-by: Narayan Reddy <narayanr@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-09-30misc: issp: add lock for usb reset operationJun Yan
usb reset operation should be in critical region. Add mutex lock to prevent two WARs resetting the USB together. Bug 1364476 Change-Id: I4c17a61a594cad496f5444e919cf101f8098da25 Signed-off-by: Jun Yan <juyan@nvidia.com> Reviewed-on: http://git-master/r/278072 Reviewed-by: Anshul Jain (SW) <anshulj@nvidia.com> Tested-by: Anshul Jain (SW) <anshulj@nvidia.com> Reviewed-on: http://git-master/r/279102 Reviewed-by: Automatic_Commit_Validation_User
2013-09-30misc: issp: hold wake lock while resetAnshul Jain
Hold wakelock to prevent system goto LP0 again. Bug 1364476 Signed-off-by: Anshul Jain <anshulj@nvidia.com> Change-Id: Id38d6dfaf6ed06a36a019d942786e09e89556875 Reviewed-on: http://git-master/r/276000 Reviewed-on: http://git-master/r/279101 Reviewed-by: Jun Yan <juyan@nvidia.com> Tested-by: Jun Yan <juyan@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
2013-09-30misc: issp: add sysfs node to control issp pinsJun Yan
issp_reset: toggle issp reset pin. issp_usbreset: reload usb driver and toggle issp reset pin issp_data: read and write the state of issp_data pin issp_clk: read and write the state of issp_clk pin Bug 1364476 Change-Id: I3b470f0745ed002b16bdc71f661e0d18629f796f Signed-off-by: Jun Yan <juyan@nvidia.com> Reviewed-on: http://git-master/r/259787 Reviewed-by: Anshul Jain (SW) <anshulj@nvidia.com> Tested-by: Anshul Jain (SW) <anshulj@nvidia.com> Reviewed-on: http://git-master/r/279099 Reviewed-by: Automatic_Commit_Validation_User
2013-09-30power: bq2419x: Remove wdt reset printAnshul Jain
Change-Id: I1f8d19add271531bf6489e076da847582fd952f5 Signed-off-by: Anshul Jain <anshulj@nvidia.com> Reviewed-on: http://git-master/r/275442 Reviewed-on: http://git-master/r/279100 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Jun Yan <juyan@nvidia.com> Tested-by: Jun Yan <juyan@nvidia.com>
2013-09-26usb: gadget: tegra: Reduce CPU boost trigger sizeRakesh Bodla
Decrease the CPU frequency boosting trigger size. Bug 1343869 Change-Id: Ice4584196c053f06f58ca662dd7a4f67a7c57ab3 Signed-off-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-on: http://git-master/r/278169 GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2013-09-24hid: hid-input: decrease hid joystick fuzz valueJun Yan
Decrease hid fuzz value to range/1024 to enable better joystick axis granularity on Linux/Android. Bug 1358167 Change-Id: Ib8713bdbe1f1edaa0e963d8472afbe30b6afe909 Signed-off-by: Jun Yan <juyan@nvidia.com> Reviewed-on: http://git-master/r/276540 Reviewed-by: Anshul Jain (SW) <anshulj@nvidia.com> GVS: Gerrit_Virtual_Submit
2013-09-20video: tegra: dc: check ext enabled before flipSpencer Sutterlin
Bug 1346021 Change-Id: Id7d8050d33b861da555969dd77674e49b40e159a Signed-off-by: Spencer Sutterlin <ssutterlin@nvidia.com> Reviewed-on: http://git-master/r/274563 (cherry picked from commit 3d9bda712bd8c449c54506f55f45103758b0d00e) Reviewed-on: http://git-master/r/274073 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com> Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
2013-09-19power: bq2419x: Fix charger type status updatePradeep Goudagunta
We update charger type as AC even if the charging current is less than 500mA. Bug 1357573 Change-Id: I636eaaa13a2529b1d1d90559d4e634feb6771866 Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com> Reviewed-on: http://git-master/r/275076 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2013-09-19misc: tegra-profiler: remove excess callchainsIgor Nabirushkin
Tegra Profiler: improve performance by removing unnecessary callchains Bug 1364258 Change-Id: Ib2b196660fbaecb9d11af65102145727aa22d110 Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com> Reviewed-on: http://git-master/r/272093 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Tested-by: Maxim Morin <mmorin@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-09-19misc: tegra-profiler: add /proc entriesIgor Nabirushkin
Tegra Profiler: show version and capabilities: /proc/quadd/version /proc/quadd/capabilities Bug 1364258 Bug 1312406 Change-Id: I08f549557a872e719dcca5f9ef4ec05a7ae01296 Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com> Reviewed-on: http://git-master/r/272090 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Tested-by: Maxim Morin <mmorin@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-09-19misc: tegra-profiler: fix incorrect namesIgor Nabirushkin
Tegra Profiler: fix incorrect names of modules. mmap buffers are created for each core Bug 1364251 Bug 1312406 Change-Id: I09e9c9c09e77ab480f53e9b1601554677b2d20e0 Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com> Reviewed-on: http://git-master/r/272089 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Tested-by: Maxim Morin <mmorin@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-09-18input: misc: mpu: change self test criteriaXiaohui Tao
1) Increasing the at rest (Test #3) Threshold from 10dps to 40dps Invensense claims this was a programming error from their side and was updated in their code base over a year ago. They say all their customers are using (or should be) using the new code (with the relaxed threshold). 2) Increasing the ST compare (Test #1) Threshold from 14% to 50% Their response was 14% was set based on their factory results. However, over time, they had several customer investigations and found that their customer environments are a lot nosier than their factory. Based on more collected samples from the customer site, they increased this limit from 14% to 50%. They claim a major tablet manufacturer with 100.s of thousands of units has taken the new 50% threshold over a year ago and currently no reported test escapes with the new threshold. Bug 1343976 Change-Id: I684f186134db3717d4d1304c14f97dd310843cab Reviewed-on: http://git-master/r/263972 (cherry picked from commit 949749fdd3be199823c188a8993016bd63ab12e6) Signed-off-by: Xiaohui Tao <xtao@nvidia.com> Reviewed-on: http://git-master/r/266164 (cherry picked from commit a1f9ad5ac420618535d8206874b1de8d475dd0cb) Reviewed-on: http://git-master/r/273320 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
2013-09-16mmc: tegra: 1.39V Tuning during device enumerationPavan Kunapuli
Tuning at 1.39V to find a valid tap value that works at all core voltages. Boosting emc clock to 900MHz before setting 1.39V and releasing the frequency after 1.39V setting is removed. Bug 1331018 Reviewed-on: http://git-master/r/252471 (cherry picked from commit 25efc183d9f57431c379fecce0e2cc541b0fbc93) Change-Id: Icbf009a90ba9d0bd88a5991aab2fad8f1783b823 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com> Change-Id: I512a29e94cb935c12a8e705da1d4478c640c9529 Reviewed-on: http://git-master/r/274994 GVS: Gerrit_Virtual_Submit Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
2013-09-16mmc: tegra: Sysfs for changing tap valueNaveen Kumar Arepalli
Sysfs for changing tap value for wifi Reviewed-on: http://git-master/r/250897 (cherry picked from commit 6028c371506333406df500da2af53b1c52f454da) Change-Id: I08e0971c562cf1e491373173d5b3b7e5af1da6ba Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com> Reviewed-on: http://git-master/r/250724 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
2013-09-16ARM: tegra: roth: Mask HS200 mode supportPavan Kunapuli
Mask HS200 mode support for sdmmc4. In DDR50 mode for eMMC can support max clock of 52MHz. For Tegra sdmmc controllers, the host clock in ddr mode should be double that of the eMMC device. Taking into consideration the dvfs tables, limiting ddr mode clock to 51MHz to allow for lower core voltages to set even when sdmmc4 clock is ON. Bug 1287739 BUg 1324297 Reviewed-on: http://git-master/r/230048 (cherry picked from commit d7214ec63a22383be14ee4f1fb424ad8e0f00364) Change-Id: Ib04dce91d771ab5505dd67ea3a8d5c704d0b499e Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com> Change-Id: I539439a3ccff3f75a25ea13198aa6267a7293dca Reviewed-on: http://git-master/r/274993 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
2013-09-16mmc: Limit MMC speed to 52MHz if not HS200Al Cooper
If "caps2" host capabilities does not indicate support for MMC HS200, don't allow clock speeds >52MHz. Currently, for MMC, the clock speed is set to the lesser of the max speed the eMMC module supports (card->ext_csd.hs_max_dtr) or the max base clock of the host controller (host->f_max based on BASE_CLK_FREQ in the host CAPS register). This means that a host controller that doesn't support HS200 mode but has a base clock of 100MHz and an eMMC module that supports HS200 speeds will end up using a 100MHz clock. Signed-off-by: Al Cooper <alcooperx@gmail.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit ccb52a00fd3fdea428e29816cbacb0a78090d474) Reviewed-on: http://git-master/r/227758 (cherry picked from commit ed5cc4ef1e8bcdae292b6f234dbb7054cf5542cb) Change-Id: I2967fcc733b7178bdf54d6f75f65bdff253fc1cc Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com> Change-Id: Iac4fda7a964c2a7791d62046376800de4f7a26bd Reviewed-on: http://git-master/r/274992 GVS: Gerrit_Virtual_Submit Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
2013-09-16mmc: core: fix the decision of HS200/DDR card-typeSeungwon Jeon
Current implementation decides the card type exclusively. Even though eMMC device can support both HS200 and DDR mode, card type will be set only for HS200. If the host doesn't support HS200 but has DDR capability, then DDR mode can't be selected. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> (cherry picked from commit 96cf5f02aee8bbeff38824b18b9ec583d687f846) Reviewed-on: http://git-master/r/227757 (cherry picked from commit 084aa8cc074b0e95883934f82f5521d0cc5e0941) Change-Id: Id2b9095f8ffe59c520850acd40681a9ef15c3ff9 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com> Change-Id: I3bb070fdb724b817de4475a77c3191b77e654243 Reviewed-on: http://git-master/r/274991 GVS: Gerrit_Virtual_Submit Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
2013-09-12regulator:palmas: Sysfs node to change smps45 modeAnshul Jain
This change creates a sysfs node /sys/bus/platform/devices/palmas-pmic/auto_smps45_ctrl echo 1 : force multi phase mode echo 0: auto phase selection Bug 1323712 Change-Id: Ibbac78cf841b1cda3444ad388426a0da4a67c38a Signed-off-by: Anshul Jain <anshulj@nvidia.com> (cherry picked from commit 4bd6aa227ef632c0bf32761262799490c6aa33bf) Reviewed-on: http://git-master/r/253685 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit
2013-09-12ARM: tegra11: dvfs: Update T40T frequency limitsAlex Frid
Change-Id: I25851ce78f034ac592a0bd39ded1444f0a7e230d Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/251056 (cherry picked from commit 5fae13057d44640c55a2fe5e09e118b6bacebd92) Reviewed-on: http://git-master/r/253674 Tested-by: Shaoming Feng <shaomingf@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-09-12ARM: tegra: roth: Limit SD card clock to 82MHzPavan Kunapuli
Limiting SD card clock to 82MHz to ensure that the tap values obtained through tuning work with the full core voltage range even with boost mode enabled Reviewed-on: http://git-master/r/252371 (cherry picked from commit 0d07482e116768eb1dc413c940f4168e609a11fe) Change-Id: I562bb651d8eca8d412ea464cfbdca1b692783e55 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/253716 Reviewed-by: Harshada Kale <hkale@nvidia.com> Tested-by: Harshada Kale <hkale@nvidia.com>
2013-09-12ARM: tegra11: clock: Add emc and host1x sysfs floorsAlex Frid
Change-Id: Ia8bf319da85914e748c4a88877433e6c45667ef1 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/250565 (cherry picked from commit 025b4feb4254f31a748ff926b225ffbde7960f1c) Reviewed-on: http://git-master/r/253682 Tested-by: Shaoming Feng <shaomingf@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-09-12ARM: tegra: clock: Add sysfs interface for bus floorsAlex Frid
Added mechanism to install sysfs objects for tegra shared bus floors. Currently no floor objects are installed. Change-Id: I20e1a1448ee799a5ec59087f3214b77a80c05408 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/250564 (cherry picked from commit caf42e72c877189dfc3b75d3d9d21fb2d2491fef) Reviewed-on: http://git-master/r/253681 Tested-by: Shaoming Feng <shaomingf@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-09-12ARM: tegra11: clock: Expand host1x shared busAlex Frid
Add cap, floor, and override shared users to host1x bus. Attached cap user to core cap interface. Change-Id: I20bf5f346f422d7f2cbd97a445f00847e8761ac8 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/250563 (cherry picked from commit 01be9d99e4593df6fc149497d14bc4903e2bdd7e) Reviewed-on: http://git-master/r/253680 Tested-by: Shaoming Feng <shaomingf@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-09-12ARM: tegra11: clock: Re-factor host1x busAlex Frid
- Set host1x dev_id = "host1x" and con_id = NULL (these definitions were used before conversion of host1x to shared bus; during conversion ids were inadvertently swapped - restored now) - Renamed host1x bus shared users to be consistent with other shared buses Change-Id: Iecf1f27681658c69fc63ed71c99d62ae86d9f30b Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/250562 (cherry picked from commit a96193452c05aca8596659a3a2f4346ad1818306) Reviewed-on: http://git-master/r/253679 Tested-by: Shaoming Feng <shaomingf@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-09-12ARM: tegra11: clock: Add host1x shared busAlex Frid
Change-Id: Ie63f856727f9ba9f93e6c75b7bd5fb80357448a4 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/250561 (cherry picked from commit 2899d88dd8afa1971f2c1b09b7039852a65a5f4f) Reviewed-on: http://git-master/r/253678 Tested-by: Shaoming Feng <shaomingf@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2013-09-12ARM: tegra: clock: Update emc monitor preset mechanismAlex Frid
- Allowed per-SoC code to select emc monitor preset rate. For now, rounded down boot rate is used as monitor preset rate (round down to not over-clock on boot). - Skipped emc clock update when monitor preset rate is set, but not yet enabled (to avoid temporary dip in EMC rate). EMC rate is updated only when monitor preset is enabled. - Preset EMC monitor rate after iso usage table is initialized. Signed-off-by: Alex Frid <afrid@nvidia.com> Change-Id: I2b724df9dc95231d6a5760171aa18bd10bdb409a Reviewed-on: http://git-master/r/250525 (cherry picked from commit 0a3c757d15fc8360ba54e123907dbb4dd46c8d22) Reviewed-on: http://git-master/r/253677 Tested-by: Shaoming Feng <shaomingf@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-26 02:19:21 +0000