Age | Commit message (Collapse) | Author |
|
Enable OV5650 and OV5640 sensor in Cardhu board file with the help of
Tegra V4L2 SoC camera interface.
To use V4L2 driver, we need to disable old camera HAL driver.
Bug 1240806
Bug 1369083
Change-Id: I0dc529d44fba4d80b45690e384e8bf81b29f69e5
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/246266
(cherry picked from commit 6b2f7cc4117208dc992478f27d5873ea38071fdc)
Reviewed-on: http://git-master/r/279988
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
|
|
Add support for dual cameras from both CSI-A and CSI-B:
- move all the CSI settings into video buffer struct
- queue the video buffer struct to a dedicated queue
- process one video buffer struct from the queue at one time
Bug 1369083
Change-Id: Ie64d69282ab991b66e97327e288a2bacde088bd6
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/246269
(cherry picked from commit 228b0c2d9ae3fa1121f88836626d654ae0fc4ff0)
Reviewed-on: http://git-master/r/279987
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
|
|
soc_camera_link supports passing power on/off control callback to
soc_camera stack. So the power control can be handled by soc_camera
stack instead of our Tegra V4L2 host driver.
Also pass other platform_data fields via soc_camera_link instead of
a hacking nvhost_device_data struct.
Bug 1240806
Bug 1369083
Change-Id: I443a7d28196cc8292805da70d2d5ff1c3cd50a5d
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/246267
(cherry picked from commit 9083d270bf93b583cd5bf5151a52ea250f8541a3)
Reviewed-on: http://git-master/r/279986
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
|
|
Bug 1369083
Change-Id: I43acb0d1dd6ca182291895d294a8458bfc99da05
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/279985
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
|
|
Use right buffer flag NVMAP_HANDLE_WRITE_COMBINE to allocate buffer,
which can be shared by VI/CSI and CPU. Don't use NVMAP_HEAP_SYSMEM.
It is validated to old T20 silicon and can't support big buffers. By
default, our nvmap_alloc() will use IOVMM to allocate buffers.
nvmap_pin() gives us IOVA for hardware engines like VI/CSI module
with IOMMU enabled in kernel. nvmap_mmap() gives us VA for CPU
read/write operations. So we need to convert VA address to physical
address of the buffer and map that buffer to user space processor's
memory space "page by page".
Bug 1369083
Change-Id: I4629eebe206c7640adf63551968fd89260dd0082
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/279984
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
|
|
- tweak offset registers
- add test mode to output color bars
- use BGGR RAW format
Bug 1369083
Change-Id: I61352c018f8ca099ff3d39158a67052a1e185eec
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/279983
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
|
|
Reworked driver in order to properly support default watchdog api
such as triggering by writing a character and disable by sending
a magic character. Renamed ENABLE_ON_PROBE to ENABLE_HEARTBEAT
which triggers the watchdog using the interrupt service routine.
|
|
Configure pll_a during boot so that
locking to pll_a does not fail
Bug 1330751
Change-Id: I188f0be211379f43770b24c5b382dec2788aefda
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/269469
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jong Kim <jongk@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
|
|
DVFS entry is fixed for Hynix_2GB_H5TC4G83MFR-PBA
to support all emc frequencies.
Bug 1218885
Change-Id: Id9d578499e495f43db1a072cbcee25a353fa78f5
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/210653
(cherry picked from commit 688bf04ff67e2c1ff22762f4f578b925ff3b9f3c)
Reviewed-on: http://git-master/r/273530
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
|
|
Initialisation of the framebuffer console on DVI-D aka HDMI always
failed on monitors which report the vertical front porch to be 1
in their EDID.
The fix now changes also the modedb and not only the list of
videomodes with a compatible timing.
This was particularly bad on Apalis T30 where this is activated
by default. On Colibri T30 this was observed when enabling it using the
fbcon=map:1 boot argument.
|
|
Up to now only the LVDS transceiver controlling GPIOs were exported.
This patch adds the generic Apalis GPIOs to the list of via sysfs to
userspace exported ones as well.
|
|
Initialisation of the framebuffer console on DVI-D aka HDMI sometimes
failed. This was particularly bad on Apalis T30 where this is activated
by default. On Colibri T30 this was observed when enabling it using the
fbcon=map:1 boot argument.
This fix curtsey of Bibek Basu from NVIDIA explicitly enables PLLA
during early clock initialisation which avoids a later race with the
display driver on DC1.
|
|
fix Coverity issue
Coverity id : 13692
Bug 1046331
Bug 1049868
Change-Id: Iefa6d076d4622368534710630b89b9a15d166378
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/165864
(cherry picked from commit db33c3f3f2447a52a40f4fd001fec9a2932ee4c8)
Reviewed-on: http://git-master/r/244637
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Tested-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
|
|
|
|
In preparation for the new Apalis resp. Colibri T30 production lots
with either T30IQS-P-A3 or T30MQS-P-A3 chips that due to some bug were
locked at 312 MHz force a speedo ID of 2 for now which allows regular
operation of up to 1.4 GHz (single core only).
|
|
I211 with a blank iNVM uses a different PCI ID. Hack the driver to load
despite i211 data sheet claiming tools only, not for driver.
Please note that the existing driver hacks concerning NVM validation
skipping and Ethernet MAC address assignment equally apply.
Tested on initial samples of Apalis T30 1GB V1.0A.
|
|
The firmware is not being in use currently.
So, turn the loading code off.
Bug 1236060
Bug 991551
Change-Id: Id41cf762b59502d0ece470e315ac75d93e3b6b39
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/218613
(cherry picked from commit f15976bdfb32d6c5e20057f6d4d57646c15a5591)
Reviewed-on: http://git-master/r/258354
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
|
|
According to Realtek, the firmware provides
power optimizations. The driver works without
the firmware. Plus, there are scenarios where
the firmware is not available, which makes the
driver wait at request_firmware call (i.e.,
60 sec wait).
Bug 1236060
Bug 991551
Change-Id: Ifcaa4b2dd48c4111ded33cf2bade7dc1f6422821
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/258353
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
|
|
Allow for jumper-less ACM operation by defaulting to 0x20 I2C address.
|
|
Enable the modular camera configuration for ACM which allows switching
not only decoders but also their inputs at run-time.
This is the only correct order to load the modules:
modprobe videobuf2-memops
modprobe videobuf2-dma-nvmap
modprobe max9526
# or modprobe adv7180
modprobe tegra_v4l2_camera
To change the decoder on the fly:
rmmod tegra_v4l2_camera
rmmod max9526
# or rmmod adv7180
modprobe adv7180
# or modprobe max9526
modprobe tegra_v4l2_camera
To get a pre-view window through gstreamer:
gst-launch v4l2src ! deinterlace tff=1 method=4 ! nv_omx_videomixer !
nv_gl_eglimagesink
To switch inputs (0-5 resp. 0-4 for ADV7180 and 0-2 for MAX9526 where 2
means auto selection):
v4l2-ctl -i 0
v4l2-ctl -i 1
v4l2-ctl -i 2
v4l2-ctl -i 3
v4l2-ctl -i 4
v4l2-ctl -i 5
To check what input is active:
v4l2-ctl -I
While at it enable NVIDIA confirmed ARM errata 716044 and 720789 as
well.
|
|
Re-work input selection to apply to a live camera stream.
While at it default to automatic input selection and make this option
available via IOCTL as input value 2 as well.
|
|
Re-work input selection to apply to a live camera stream.
While at it disable the automatic I2C module loading for now as due to
our currently redundant soc-camera-pdrv registration via board specific
platform data the adv7180 driver is always automatically loaded upon
modprobe tegra_v4l2_camera invocation.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
This patch fixes building without CONFIG_SATA_AHCI_TEGRA aka SATA
support which previously failed as follows:
...
CC arch/arm/mach-tegra/board-apalis_t30.o
~/linux-toradex/arch/arm/mach-tegra/board-apalis_t30.c:571:31: error:
'apalis_led_gpio_device' defined but not used [-Werror=unused-variable]
cc1: all warnings being treated as errors
make[2]: *** [arch/arm/mach-tegra/board-apalis_t30.o] Error 1
make[1]: *** [arch/arm/mach-tegra] Error 2
make[1]: *** Waiting for unfinished jobs....
make: *** [sub-make] Error 2
|
|
|
|
If the local critical temperature is reached the power is
unconditionally switched off. At 70°C ambient the default of 85°C
can be reached. So increase the limit in the hwmon chip to 95°C.
|
|
If the local critical temperature is reached the power is
unconditionally switched off. At 70°C ambient the default of 85°C
can be reached. So increase the limit in the hwmon chip to 95°C.
|
|
Avoid extensive HDMI messages during boot.
[ 30.234829] HDMI hot plug event: Codec=3 Pin=5 Presence_Detect=1 ELD_Valid=0
[ 30.253652] HDMI status: Codec=3 Pin=5 Presence_Detect=1 ELD_Valid=1
[ 32.333657] HDMI: detected monitor SyncMaster at connection type HDMI
[ 32.340116] HDMI: available speakers: FL/FR
[ 32.344616] HDMI: supports coding type LPCM: channels = 2, rates = 44100 48000 88200, bits = 16 20 24
|
|
export access to the 'Local Shared OS and T_Crit Limit'
register.
|
|
Hack to avoid 24 Hz mode in X resulting in no display at all. This has
been encountered using e.g. a Samsung SyncMaster F2380 if connected by
HDMI.
root@apalis-t30:~# xrandr
Screen 0: minimum 256 x 128, current 1920 x 1080, maximum 2048 x 2048
LVDS-1 connected 1920x1080+0+0 (normal left inverted right x axis y axis) 0mm x 0mm
1920x1080 58.6*+
HDMI-1 connected 1920x1080+0+0 (normal left inverted right x axis y axis) 160mm x 90mm
1920x1080 60.0 + 24.0*
1680x1050 59.9
1280x1024 75.0 60.0
1440x900 75.0 59.9
1280x960 60.0
1280x800 59.9
1152x864 75.0
1280x720 60.0 50.0
1024x768 75.0 70.1 60.0
832x624 74.6
800x600 72.2 75.0 60.3 56.2
720x576 50.0
720x480 59.9
640x480 75.0 72.8 66.7 59.9
720x400 70.1
|
|
Enable PCI quirk support resp. don't explicitly disable it in order for
the following fix to take effect.
The Apalis evaluation board needs to set the link speed to 2.5 GT/s
(GEN1). The default link speed setting is 5 GT/s (GEN2). 0x98 is the
Link Control 2 PCIe Capability Register of the PEX8605 PCIe switch. The
switch supports link speed auto negotiation, but falsely sets the link
speed to 5 GT/s.
|
|
Previously only 64-lead and 40-lead models were identified. This patch
adds 48-lead and 32-lead device identification as well.
Please note that due to missing parameter negotiation functions one
might get the following message with a subsequent crash:
WARNING: from element /GstPipeline:pipeline0/GstV4l2Src:v4l2src0: Could
not get parameters on device '/dev/video0'
This can be avoided by explicitly specifying the format as follows:
gst-launch v4l2src ! deinterlace tff=1 method=4 ! 'video/x-raw-yuv,
width=(int)720, height=(int)576, format=(fourcc)I420' !
nv_omx_videomixer ! nv_gl_eglimagesink
|
|
Integrate ADV7180 and MAX9526 video decoder support and prepare for
drivers as modules.
The following gstreamer pipeline shows a preview window:
gst-launch v4l2src ! deinterlace tff=1 method=4 ! nv_omx_videomixer !
nv_gl_eglimagesink
|
|
|
|
|
|
Integrate ADV7180 and MAX9526 video decoder support and prepare for
drivers as modules.
|
|
Powering on, improved interlacing.
|
|
|
|
Remove tegra_aes_device from the platform device list as it was listed
twice.
|
|
Move paddr to correct ifdef to enable CONFIG_NVMAP_PAGE_POOLS=n
compilation.
|
|
Use right buffer flag NVMAP_HANDLE_WRITE_COMBINE to allocate buffer,
which can be shared by VI/CSI and CPU. Don't use NVMAP_HEAP_SYSMEM.
It is validated to old T20 silicon and can't support big buffers. By
default, our nvmap_alloc() will use IOVMM to allocate buffers.
nvmap_pin() gives us IOVA for hardware engines like VI/CSI module
with IOMMU enabled in kernel. nvmap_mmap() gives us VA for CPU
read/write operations. So we need to convert VA address to physical
address of the buffer and map that buffer to user space processor's
memory space "page by page".
Change-Id: I543d9d95fc14395200647e09480f25d9bc001e00
Signed-off-by: Bryan Wu <pengw@nvidia.com>
|
|
This reverts commit 080c3135b58aa700851991fb672e6c33cf16d9d9.
|