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2013-11-12add defconfig for phyFLEX-i.MX6 pfla02PD13.2.2Christian Hemp
Version string PD13.2.2_EA1 Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-12config: Add defconfig for PD13.2.2Christian Hemp
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-12imx6: phyFLEX: add support for PCM-958 moduleChristian Hemp
Add support for the phytec WLAN module.
2013-11-12drivers: mmc: prepare mmc driver for tiwiChristian Hemp
Signed-off-by: Grigory Milev <g.milev@sam-solutions.net> Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-12Added SDIO WiFi wl1271 supportChristian Hemp
Signed-off-by: Grigory Milev <g.milev@sam-solutions.net> Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-12imx6dl: Fix for not getting sync interrupts during cameras capture.Dmitry Lavnikevich
Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.net>
2013-11-12imx6dl: Implemented creation of cameras video device.Dmitry Lavnikevich
Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.net>
2013-11-12net: phy: micrel: remove asym pause supportChristian Hemp
Micrel phy KSZ9031 and KSZ9021 have both the same HW bug with asym_pause. If asym_pause is enable you will have to unplug and replug the cable to make the phy work. Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-12imx6: set ethernet phy timings only with mod rev 2Christian Hemp
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07phyFLEX-i.MX6: remove fac hibernatePD13.2.1Christian Hemp
It is not working correct Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07phyFLEX-i.MX6: Add memory selection for GPUChristian Hemp
To allocate memory for the GPU we need the RAM size. We can choose the ramsize over the Kernelkonfig. Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07drivers:regulator da9063 reset volates on rebootChristian Hemp
The PMIC DA9063 has no reset. We need to reset the voltages themselves on reboot. Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07phyFLEX-i.MX6: Add selection for prime outputChristian Hemp
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07imx6: pfla02: change display eeprom addressChristian Hemp
Change display eeprom address to 0x50, which is default. Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07HDMI: Allow non CEA standardChristian Hemp
Don't filter mode get from EDID. The filter was added with this patch: ENGR00180117 HDMI: No audio output in 1080P on some TV Some TV support specific video mode that different with CEA standard, and it's pixel clock not comply CEA standard. But audio configuration paramter N and CTS should follow CEA standard. So audio may not work in these specific video mode. Filter video mode get from EDID, only keep standard CEA video mode in the modelist. Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07ethernet: set phy id correctChristian Hemp
Set the correct phyID for Micrel KSZ9031 Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07imx6: phyFLEX: update gpu nameChristian Hemp
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07imx6: phyFLEX: Add cmic wake pin for rev 2Christian Hemp
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07phyflex:imx6: Add delay for RX linesChristian Hemp
For the DL we need a delay on the RX lines. Without the delay we loos all packages. Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07imx6:phyflex: Add NAND muxing for dual an single coreChristian Hemp
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07imx6:phyflex: Add support for duallite and singleChristian Hemp
Add support for duallite and single core version of i.MX6 CPU Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07Fix for 'bucking' problem.Dmitry Lavnikevich
Minor changes into camera host driver: - reinitialize current buffer index with 0 on each capture start; - do not change buffer index if channel buffer wasn't updated. Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07imx6: pcie: clock: remove sata clock from pcie treeChristian Hemp
On some modules SATA don't work if pcie disable the SATA clock. Remove the SATA clock from pcie clock tree and enable SATA clock before the pcie clock. PCIe needs the SATA clock: /* * Enable SATA ref clock. * PCIe needs both sides to have the same source of refernce clock, * The SATA reference clock is taken out to link partner. */ Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07phyFLEX-i.MX6: Add busfreqChristian Hemp
The busfreq function support is in the kernel since: commit 32ea8aa56866047e100c6600cf663aaf786d8dbe Author: Ranjani Vaidyanathan <ra5478@freescale.com> Date: Tue Feb 7 14:34:13 2012 -0600 |ENGR00179574: MX6- Add bus frequency scaling support | |Add support for scaling the bus frequency (both DDR |and ahb_clk). |The DDR and AHB_CLK are dropped to 24MHz when all devices |that need high AHB frequency are disabled and the CORE |frequency is at the lowest setpoint. |The DDR is dropped to 400MHz for the video playback usecase. |In this mode the GPU, FEC, SATA etc are disabled. | |To scale the bus frequency, its necessary that all cores |except the core that is executing the DDR frequency change |are in WFE. This is achieved by generating interrupts on |un-used interrupts (Int no 139, 144, 145 and 146). | |Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com> Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07phyFLEX-i.MX6: sata: disable sata phy when sata is not enabledChristian Hemp
Add freescale SATA platform changes to phyFLEX-i.MX6 |ENGR00243339 imx: sata: disable sata phy when sata is not enabled | |In order to save power consumption, disable sata phy |(enable PDDQ mode) in kernel level, if the sata module |is not enabled in kernel configuration. | |Signed-off-by: Richard Zhu <r65037@freescale.com> Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07imx6q:phyflex: cleanup ethernet phy initChristian Hemp
Remove not needed code from ethernet phy init Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07imx: fec: Fix worng phy_speedChristian Hemp
Fix calculation for phy_speed (MII_SPEED) and use the right clock (ipg_clk). Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07imx6q: phyflex: Add support for rev2 modulesChristian Hemp
Module revison 2 has some changes compared to revision 1. NAND: - disconnected NAND_D8-D15 because only 8-Bit NAND is supported by i.MX 6 - connected NANDF_DQS (SD4_DAT0) to NAND-Flash to support sync. mode PMIC: - Moved PMIC_nIRQ from DI0_PIN15 to SD4_DAT1 PCIe: - Added nPCIe0_PERST to pad DI0_PIN15 (GPIO4_17) Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07imx6q: phyflex: remove const structsChristian Hemp
That we can change the values of the structs revisions depending the structs can't be const. Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07imx6q: Add module revison detectionChristian Hemp
The pin SD4_DAT4 until SD4_DAT7 be used as revison control. The pins will be internel pulled up so we read a 1111 for revison 1. For revison two the first pin (bit) is pulled down (see schematic pfla-02 page 4 "SDIO, NAND-Flash". On Module rev 1 the pins are connectet to the NAND but we have only 8bit NAND also the i.MX6 only can handle 8bit NAND flashs. Revisions: Rev 1: 0xF Rev 2: 0xE . . . Rev 15: 0x1 Rev 16: 0x0 Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07phyFLEX-i.MX6: Fix bootarg typoChristian Hemp
Fix cam selection typo, the cam name is tw9910 Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07camera-support:Change the frequenciesDirk Bender
Change the frequencies for the pll4 (clock.c) Change the frequencies for the different phytec camera moduls (board-mx6q_phyflex.c) Add new pll configs for the mt9p031 sensor (mt9p031.c) Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07imx6: phyflex: Remove regulator init callChristian Hemp
This is not need in the platform code. Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07imx6: Add deleay workarround to fix bootproblemsChristian Hemp
This is only a workarround to fix bootproblems with i.MX6. Sometimes the kernel dosn't boot and print the message "COULD NOT SET GP VOLTAGE". With the delay it look likes the kernel boot correct. For more informations look at: https://community.freescale.com/message/319514#319514 Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07da9063: phyflex-i.MX6: Add default LDO bypass modeChristian Hemp
If didn't set the param ldo_active param in command line we use LDO_MODE_BYPASS Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07Fixed registration of tw9910 capture board on csi interfaces.Andrei Andreyanau
Signed-off-by: Andrei Andreyanau <a.andreyanau@sam-solutions.com> modified: arch/arm/mach-mx6/board-mx6q_phyflex.c Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07Fixed i2c_board_info's typoAndrei Andreyanau
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07board-mx6q_phyflex: New bootargs addedDirk Bender
New bootargs added Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07mt9p031: Changed the possible PLL stettingsDirk Bender
The change is needed because of the setting in the platformcode. Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07Added support for faster frame rate for small resolutions for mt9m111 ↵Andrei Andreyanau
(VM-009) camera. Signed-off-by: Andrei Andreyanau <a.andreyanau@sam-solutions.com> modified: drivers/media/video/mt9m111.c Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07Fixed drive strength field for clko. Added drive strength field setting for ↵Andrei Andreyanau
clko2 Signed-off-by: Andrei Andreyanau <a.andreyanau@sam-solutions.com> modified: arch/arm/mach-mx6/board-mx6q_phyflex.h Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07Fixed support for mt9v022 (VM-007/VM-010) camera.Andrei Andreyanau
Signed-off-by: Andrei Andreyanau <a.andreyanau@sam-solutions.com> modified: arch/arm/mach-mx6/board-mx6q_phyflex.c Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07Fixed support for clko2_clk output pinAndrei Andreyanau
Signed-off-by: Andrei Andreyanau <a.andreyanau@sam-solutions.com> modified: arch/arm/mach-mx6/board-mx6q_phytec-nand.c Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07Added support for clocking the camera, connected to csi2 interface. Fixed ↵Andrei Andreyanau
clko2_clk parent clock source. Signed-off-by: Andrei Andreyanau <a.andreyanau@sam-solutions.com> modified: arch/arm/mach-mx6/clock.c Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07Fix TODO records.Grigory Milev
Signed-off-by: Uladzimir Bely <u.bely@sam-solutions.net> Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07Modify da9063 i2c driver. Added capability wakeup from da9063 irq (in ↵Anatoly Palto
particular 'power' button) Signed-off-by: Uladzimir Bely <u.bely@sam-solutions.net> Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07Fix mistake in da9063 driver to work onkeyeventsAnatoly Palto
Signed-off-by: Uladzimir Bely <u.bely@sam-solutions.net> Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07Removed 12 bit support from host camera driverAndrei Andreyanau
modified: drivers/media/video/mxc_camera.c modified: include/media/soc_camera.h Signed-off-by: Uladzimir Bely <u.bely@sam-solutions.net> Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07Added new divider for 54MHz MCLK for mt9p031 camera. Also, recalculated ↵Andrei Andreyanau
dividers for 26MHz clock source and 48/96MHz PCLK for mt9p031 camera. modified: arch/arm/mach-mx6/board-mx6q_phyflex.c modified: drivers/media/video/mt9p031.c Signed-off-by: Uladzimir Bely <u.bely@sam-solutions.net> Signed-off-by: Christian Hemp <c.hemp@phytec.de>
2013-11-07Fixed bayer sync for mt9p031 camera driverAndrei Andreyanau
modified: drivers/media/video/mt9p031.c Signed-off-by: Uladzimir Bely <u.bely@sam-solutions.net> Signed-off-by: Christian Hemp <c.hemp@phytec.de>
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