Age | Commit message (Collapse) | Author |
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Enable module versioning support (CONFIG_MODVERSIONS and
CONFIG_MODULE_SRCVERSION_ALL) which allows using kernel modules across
different kernel builds/versions.
While at it also update the Android configurations.
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This reverts commit bdf9e11d339ebc121e80e7ecdd44e0abcaf4ff38.
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When commands timeout, previously we had code to
retry the same command 3 times. But under some
situations 3 retries do not suffice. Increasing
the retries to 10 does the trick. Also if the card
does not respond after 10 retries then the card is
dead for sure. But if the same card responds in
between 3 to 10 retries then it is always beneficial
to have retries as 10.
Bug 914934
Change-Id: I6b1e95c10ca5a62dde84ce8cacbe53ad2197ab33
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/72092
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
(cherry picked from commit c4beda3e798ed91e1dadbce4206b407832fcc40b)
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If the data commands fail due to some error, retry the transfer.
Add 3 retries for data commands.
for bug 914934
Change-Id: I53245ddd159abdbade09f841d9490d2f106e7c88
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/71181
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
(cherry picked from commit fd804ee58d3f9ce10cb2fe16aa76ae0407912d32)
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Add tracepoints to record the start and end of each mmc block
operation. This includes read, write, erase, secure erase,
trim, secure trim1 and secure trim 2, discard and
sanitize commands.
Change-Id: Ic5d1cbdb9adb940d8b1a2a13c73970023575df50
Signed-off-by: Ken Sumrall <ksumrall@android.com>
Signed-off-by: Iliyan Malchev <malchev@google.com>
Conflicts:
drivers/mmc/card/block.c
drivers/mmc/core/core.c
(cherry picked from commit 4de9a433c26e47d9b4a93105eb92935321100786)
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Support discard feature if MID field in the CID register is 0x15, EXT.CSD[192]
(device version) is 5 and Bit 0 in the EXT.CSD[64] is 1. Also removed REQ_SECURE flag
check to avoid kernel hang.
This patch is released from samsung.
Change-Id: I4023a900680e9bca10c40311b09ed077a22617db
(cherry picked from commit 4acc227edfb631d377e14911287c1b73682fc9c2)
Conflicts:
drivers/mmc/card/block.c
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Change-Id: Ia56018522e5d18ca5bfd25858ec943da93d3edc3
(cherry picked from commit e363e576f448d6132340c5d0bda580fef212888d)
Conflicts:
drivers/mmc/host/sdhci-tegra.c
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Change-Id: I46e3f1a158d61a0b255fae5d510c8f87579c435d
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/47847
Reviewed-by: Kirt Hsieh <Kirt_Hsieh@asus.com>
Tested-by: Kirt Hsieh <Kirt_Hsieh@asus.com>
Reviewed-by: Vincent Yue <Vincent_Yue@asus.com>
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/48199
Reviewed-by: Jim1 Lin <jim1_lin@asus.com>
Tested-by: Jim1 Lin <jim1_lin@asus.com>
Reviewed-by: Leslie Yu <Leslie_Yu@asus.com>
(cherry picked from commit 8eadc6d514b7838c398ff3499ab5f2e012e2fc06)
Conflicts:
drivers/mmc/host/sdhci.c
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Change-Id: I40a8481618b1a5995a713ff343c7532badd20b65
Change-Id: I399302118c9d8d8246a4a304ff7a1ea80889dbc6
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/45568
Reviewed-by: Ban Feng <Ban_Feng@asus.com>
Tested-by: Ban Feng <Ban_Feng@asus.com>
Reviewed-by: Sam hblee <Sam_hblee@asus.com>
(cherry picked from commit 121c0c6dffe16c683f4dbf00ed841fb4de1f70a0)
Conflicts:
drivers/mmc/core/mmc.c
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Change-Id: I28d670944cbfd55e2b2ad98b727368a8dfdc0944
Change-Id: I2bb65335c2468b257473fe264e705826cfd4474e
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/45300
Reviewed-by: Ban Feng <Ban_Feng@asus.com>
Tested-by: Ban Feng <Ban_Feng@asus.com>
Reviewed-by: Sam hblee <Sam_hblee@asus.com>
(cherry picked from commit 1711f72a9840f3667cf93c774ac16c2d8417375c)
Conflicts:
drivers/mmc/core/core.c
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Change-Id: I89b544afbb0a109a222621a9948399fba8f77693
Change-Id: Ie366a152100a478e7811b4395f3fae9794bb1386
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/45221
Reviewed-by: Ban Feng <Ban_Feng@asus.com>
Tested-by: Ban Feng <Ban_Feng@asus.com>
Reviewed-by: Sam hblee <Sam_hblee@asus.com>
Conflicts:
drivers/mmc/core/mmc.c
include/linux/mmc/card.h
asdf
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Commit fe4c58c4b96a24aba8e27956e8158b3002723b17 adding ADV7280 support
introduced the following warning being printed during boot:
[ 1.121072] sysfs: cannot create duplicate filename
'/devices/platform/soc-camera-pdrv.3'
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(tegra-l4t-r16-16.5)
Conflicts:
drivers/media/video/tegra_v4l2_camera.c
drivers/mmc/host/sdhci.c
drivers/watchdog/tegra_wdt.c
include/media/tegra_v4l2_camera.h
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This patch adds optional UHS support for the 8-bit MMC controller.
Please note that this requires V1.1A or later module hardware plus the
pull-up resistors on the data as well as the command signal lines of
your carrier board need to be removed (e.g. R46 to R54 on our Apalis
Evaluation Board V1.1A). If those pre-requisites are met support can be
enabled using the following kernel command line parameter:
mmc_uhs=1
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Certain low-speed USB devices were not detected correctly when plugged
into a running system.
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The pixel clock polarity setting was wrong: The kernel display flags
are rather somewhat confusing: The flags specify the edge where the
data should be driven by the controller (and hence not sampled by the
display!).
Please note that we don't change the default pixel clock polarity.
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Our move to modedb lead to the HDMI display controller always being
enabled (unless forced off by vidargs). This patch makes sure it gets
disabled upon boot disconnected as well as upon later disconnect.
Note: This also fixes DVFS on Colibri T30 in the sense that it will
again stay at 400 MHz EMC as long as no DVI-D aka HDMI display is
connected during boot.
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As stated by the eMMC 5.0 specification, a chip should not be rejected
only because of the revision stated in the EXT_CSD_REV field of the
EXT_CSD register.
Remove the control on this value, the control of the CSD_STRUCTURE field
should be sufficient to reject future incompatible changes.
Signed-off-by: Romain Izard <romain.izard.pro@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 03a59437ef6b6ad7fb0165cb9b96c08d6bf057fc)
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With the new eMMC5.1 spec, there is a new EXT_CSD register with
the revision number(EXT_CSD_REV) 7. This patch updates the check
for ext-csd.rev number as 7.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
(cherry picked from commit 6636bad839d9936e73e48c4841eda83a58fcdb53)
Conflicts:
drivers/mmc/core/mmc.c
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Both the Apalis EvalBoard as well as Ixora allow their LTC2954
pushbutton on/off controller to optionally initiate orderly shutdown
via GPIO interrupt on GPIO5 upon short power button press (short here
meaning really short unless C137 resp. C35 is assembled). For this to
work the following wiring is required:
Apalis EvalBoard V1.1a X61-4 to X2-6
Ixora V1.0a X5-4 to X27-17
For systemd/logind to actually use this as a power-switch a custom udev
rule /etc/udev/rules.d/70-power-switch-apalis_t30.rules as follows is
required:
# Specific rule for apalis_t30:
#
# Apalis T30's power button is not part of the kernel acpi subsystem.
# Let's manually add the power-switch tag to control its behaviour with
# systemd/logind
ACTION=="remove", GOTO="power_apalis_t30_end"
SUBSYSTEM=="input", KERNEL=="event1", TAG+="power-switch"
LABEL="power_apalis_t30_end"
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Both the Apalis EvalBoard as well as Ixora allow their LTC2954
pushbutton on/off controller to optionally be forced off by using a
GPIO. This patch implements this upon poweroff/shutdown using Apalis
GPIO6 which happens to be internally pulled-up upon power-on reset
(otherwise we would immediately get powered off again). For this to
work the following wiring is required:
Apalis EvalBoard V1.1a X2-A5 to X61-5
Ixora V1.0a X27-18 to X5-5
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The wake-up-key (formerly power-key) on MXM3 pin 37 aka WAKE1_MICO is
actually active-low due to the EvalBoard v1.1a having 4.7 K pull-up.
This patch fixes this.
While at it also get rid of the custom wakeup_key handling blindly
copied from T20 as non of the other T30 boards do this and it anyway
might only be required for LP0 which we anyway do not support so far.
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This commit, updates the driver to work faster with 32-Lead and 40-Lead
versions of adv7180 chip. Output pin VS/FIELD is now configured as
VSYNC.
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This patch fixes a clock related audio hub driver lock-up observed when
booting with mainline U-Boot which we are in the process of migrating
to now.
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Newer eMMC standards use CMD23 for multi-block transfer. These
command has the advantage that only one command is necessary, no
stop command after the transfer is required. The kernel already
supports this command, but we need to enable the capability on
the host level.
Tests verified that the MMC code detects that SD-card do not
support CMD23 and hence don't use that command.
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While in list_for_each_entry() of yaffs_flush_inodes, the fs code
can delete inodes. This leads to an endless loop which causes a
softlockup. Typically this happend in sync_supers when creating
and deleting files while under CPU load.
This fix checks whether we get twice the same inode. If this is
true, we just retry again.
This is an alternative fix to the proposed fix Jisheng Zhang:
yaffs: fix softlockup cauesed by inode deleted when scanning s_inodes list
http://www.aleph1.co.uk/lurker/message/20110831.075307.3cfeacdf.fr.html
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Do not disable and re-enable clocks after deasserting
PCIE, AFI and PCIEX resets. Deasserting the resets should
be followed by programming the PCIE.
Bug 1521306
Change-Id: Idc43bc9b21cac3818852ed059fe512f4cd75b748
Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/495616
GVS: Gerrit_Virtual_Submit
Reviewed-by: Eric Brower <ebrower@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
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PCIe Reset line must be asserted for at least 100us after clock is enabled.
PEX 2 Controller Register fix, offsets are not at constant intervals.
Bug 1521306
Reviewed-on: http://git-master/r/225399
(cherry picked from commit df0760bf515236bed2e87e590509642ab72a01b5)
Change-Id: I7b44ea51e7e02f2bca93cfc75ed85e01ab91fe03
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/435598
Reviewed-by: Jay Agarwal <jagarwal@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Eric Brower <ebrower@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
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The fsync function in the fs.h header file in our kernel version has
two additional function introduced by this commit:
02c24a82187d5a628c68edfe71ae60dc135cd178
fs: push i_mutex and filemap_write_and_wait down into ->fsync() handlers
Update the function prototype for YAFFS2 too to avoid missinterpreted
datasync parameter and to avoid warnings.
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Since commit e5d80e82e32e (ASoC: sgtl5000: Convert to use regmap directly) a
kernel oops is observed after a suspend/resume sequence.
The kernel oops happens inside sgtl5000_restore_regs() as codec->reg_cache is no
longer a valid pointer.
Add the remaining register entries into sgtl5000_reg_defaults[] and remove
sgtl5000_restore_regs() completely, which allows suspend/resume to work fine and
make the code simpler.
Tested on a im53-qsb board.
Reported-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 29aa37cddfb9b721013ff28608200d73a9426368)
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Powering down PLL before switching to a mode that does not use it
is a bad idea. It would cause the SGTL5000 be without internal
clock supply, especially on the I2C interface, which would make
subsequent access to it fail.
Thus, in case of not using PLL any longer, first set the mode
control, then power down PLL.
Signed-off-by: Oskar Schirmer <oskar@scara.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit e06e4c2d530fd4995c41083009647263ccd77d3b)
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The SGTL5000 Capture Attenuate Switch (or "ADC Volume Range Reduction"
as it is called in the manual) is single bit only.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 65f2b226763bc348a9b9145aa5e17e7e3f6d8c35)
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When a sound capture/playback is terminated while a playback/capture
is running, power_vag_event() will clear SGTL5000_CHIP_ANA_POWER in
the SND_SOC_DAPM_PRE_PMD event, thus muting the respective other
channel.
Don't clear SGTL5000_CHIP_ANA_POWER when both DAC and ADC are active
to prevent this.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit f091f3f07328f75d20a2a5970d1f8b58d95fc990)
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According to the sgtl5000 reference manual, the default value of CHIP_SSS_CTRL
is 0x10.
Reported-by: Oskar Schirmer <oskar@scara.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org
(cherry picked from commit 016fcab8ff46fca29375d484226ec91932aa4a07)
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The VAG_POWER must be enabled after all other bits in CHIP_ANA_POWER
and disabled before any other bit in CHIP_ANA_POWER. See the SGTL5000
datasheet (Table 31, BIT 7, page 42-43). Failing to follow this order
will result in ugly loud "POP" noise at the end of playback.
To achieve such order, use the _PRE and _POST DAPM widgets to trigger
the power_vag_event, where the event type check has to be fixed
accordingly as well.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit dd4d2d6dfb49e8916064f2cb07f0ad7b32a82fb7)
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After a 'reboot' command in Linux or after pressing the system's reset button
the sgtl5000 driver fails to probe:
sgtl5000 0-000a: Device with ID register ffff is not a sgtl5000
sgtl5000 0-000a: ASoC: failed to probe CODEC -19
imx-sgtl5000 sound.12: ASoC: failed to instantiate card -19
imx-sgtl5000 sound.12: snd_soc_register_card failed (-19)
sgtl5000 codec does not have a reset line, nor a reset command in software, so
after a system reset the codec does not contain the default register values
from sgtl5000_reg_defaults[] anymore, as these are only valid after a
power-on-reset cycle.
Fix this issue by explicitly reading all the reset register values from
sgtl5000_reg_defaults[] and writing them back into sgtl5000 to ensure a sane
state.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(cherry picked from commit af8ee11209e749c75eabf32b2a4ca631f396acf8)
Conflicts:
sound/soc/codecs/sgtl5000.c
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Do not disable and re-enable clocks after deasserting
PCIE, AFI and PCIEX resets. Deasserting the resets should
be followed by programming the PCIE.
Bug 1521306
Change-Id: Idc43bc9b21cac3818852ed059fe512f4cd75b748
Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com>
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Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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The whole rounding stuff really depends on a specific resolution.
This reverts commit 4dd83942b418b937e3da02746baabf63f37fe682.
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Force round down in division calculating required logo height as
preceding code did round up as follows:
logo_lines = DIV_ROUND_UP(logo_height, vc->vc_font.height);
Which resulted in no boot-logo shown at all due to not enough lines
being available.
Additionally disable cursor for custom boot logo.
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Using this unconditionally cuts the birds feet (;-p).
This reverts commit 491f263ebfb338c59abfbde6d4e0e7256a0150fa.
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Make sure that we dont enter infinite loop due to
negative value of pins in some cases. Also remove
debugging check for refcount.
Bug 1478467
Change-Id: I7df8efa5b3cf8927a0c18363add4f031aca48e48
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/450209
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
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Also use nvhost_syncpt_incr_max_ext().
Bug 1478352
Change-Id: Ib868bd2bd7a070e4c410e48bd51977ac45b7d477
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/439471
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
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There could be race in refcount update leading to
access of module registers without enabling the clock
and power.This patch tries to catch such instances
and enables power.
Bug 1478467
Change-Id: Ia32da44bfcd7838e312815b6261ccadf4470a761
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/448701
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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nvhost_job_unpin should always get the nvmap_handle_ref
from rb_entry after validating handle and presence
in the tree.
Bug 1478467
Change-Id: Ibf5f64a1a82fea8adbf7500bdb36b76357776448
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/436076
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
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