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path: root/drivers/tty/serial/imx.c
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Diffstat (limited to 'drivers/tty/serial/imx.c')
-rw-r--r--drivers/tty/serial/imx.c31
1 files changed, 27 insertions, 4 deletions
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index a2aca5503315..612ec2d2d719 100644
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -576,7 +576,7 @@ static void dma_tx_work(struct work_struct *w)
dev_err(dev, "DMA mapping error for TX.\n");
goto err_out;
}
- desc = dmaengine_prep_slave_sg(chan, sgl, sport->dma_tx_nents,
+ desc = dmaengine_prep_slave_sg(chan, sgl, ret,
DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT);
if (!desc) {
dev_err(dev, "We cannot prepare for the TX slave dma!\n");
@@ -2016,7 +2016,7 @@ imx_console_setup(struct console *co, char *options)
retval = clk_prepare(sport->clk_per);
if (retval)
- clk_disable_unprepare(sport->clk_ipg);
+ clk_unprepare(sport->clk_ipg);
error_console:
return retval;
@@ -2113,6 +2113,19 @@ static int serial_imx_probe_dt(struct imx_port *sport,
if (of_get_property(np, "rts-gpios", NULL))
sport->have_rtsgpio = 1;
+ sport->port.rs485.flags |= SER_RS485_RTS_AFTER_SEND;
+
+ if (of_property_read_bool(np, "linux,rs485-enabled-at-boot-time"))
+ sport->port.rs485.flags |= SER_RS485_ENABLED;
+
+ if (of_property_read_bool(np, "rs485-rx-during-tx"))
+ sport->port.rs485.flags |= SER_RS485_RX_DURING_TX;
+
+ if (of_property_read_bool(np, "rs485-rts-active-low")) {
+ sport->port.rs485.flags &= ~SER_RS485_RTS_ON_SEND;
+ sport->port.rs485.flags |= SER_RS485_RTS_AFTER_SEND;
+ }
+
return 0;
}
#else
@@ -2180,8 +2193,6 @@ static int serial_imx_probe(struct platform_device *pdev)
sport->port.fifosize = 32;
sport->port.ops = &imx_pops;
sport->port.rs485_config = imx_rs485_config;
- sport->port.rs485.flags =
- SER_RS485_RTS_ON_SEND | SER_RS485_RX_DURING_TX;
sport->port.flags = UPF_BOOT_AUTOCONF;
init_timer(&sport->timer);
sport->timer.function = imx_timeout;
@@ -2261,6 +2272,18 @@ static int serial_imx_probe(struct platform_device *pdev)
clk_disable_unprepare(sport->clk_ipg);
+ /* if DTE mode is requested, make sure DTE mode is selected
+ and then disable DCDDELT/RIDELT interrupts */
+ if (!is_imx1_uart(sport) && sport->dte_mode) {
+ unsigned long temp;
+ temp = readl(sport->port.membase + UFCR);
+ temp |= UFCR_DCEDTE;
+ writel(temp, sport->port.membase + UFCR);
+ temp = readl(sport->port.membase + UCR3);
+ temp &= ~(UCR3_DCD | UCR3_RI);
+ writel(temp, sport->port.membase + UCR3);
+ }
+
/*
* Allocate the IRQ(s) i.MX1 has three interrupts whereas later
* chips only have one interrupt.