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Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi25
1 files changed, 24 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
index b90fa8fd5d37..89a0924faabe 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
@@ -827,7 +827,30 @@
};
};
-/* TODO: Verdin PCIE_1 */
+/* Verdin PCIE_1 */
+&pcie {
+ assigned-clocks = <&clk IMX8MP_CLK_HSIO_AXI>,
+ <&clk IMX8MP_CLK_PCIE_AUX>;
+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>,
+ <&clk IMX8MP_SYS_PLL2_50M>;
+ assigned-clock-rates = <500000000>, <10000000>;
+ bus-range = <0x00 0xff>;
+ clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
+ <&clk IMX8MP_CLK_PCIE_AUX>,
+ <&clk IMX8MP_CLK_HSIO_AXI>,
+ <&clk IMX8MP_CLK_PCIE_ROOT>;
+ clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+ ext_osc = <0>;
+ l1ss-disabled;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ /* PCIE_1_RESET# (SODIMM 244) */
+ reset-gpio = <&gpio4 19 GPIO_ACTIVE_LOW>;
+};
+
+&pcie_phy {
+ ext_osc = <0>;
+};
/* Verdin PWM_1 */
&pwm1 {