diff options
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi | 60 |
1 files changed, 57 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi index 4b8f86f63081..bb3ac603ad7b 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi @@ -3,7 +3,35 @@ * Copyright 2022 Toradex */ -/* TODO: Audio Codec */ +/ { + sound_card: sound-card { + compatible = "simple-audio-card"; + simple-audio-card,bitclock-master = <&dailink_master>; + simple-audio-card,format = "i2s"; + simple-audio-card,frame-master = <&dailink_master>; + simple-audio-card,name = "imx8mp-wm8904"; + simple-audio-card,routing = + "Headphone Jack", "HPOUTL", + "Headphone Jack", "HPOUTR", + "IN2L", "Line In Jack", + "IN2R", "Line In Jack", + "Headphone Jack", "MICBIAS", + "IN1L", "Headphone Jack"; + simple-audio-card,widgets = + "Microphone", "Headphone Jack", + "Headphone", "Headphone Jack", + "Line", "Line In Jack"; + + dailink_master: simple-audio-card,codec { + sound-dai = <&wm8904_1a>; + clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI1_MCLK1>; + }; + + simple-audio-card,cpu { + sound-dai = <&sai1>; + }; + }; +}; &backlight { power-supply = <®_3p3v>; @@ -64,7 +92,21 @@ &i2c4 { status = "okay"; - /* TODO: Audio Codec */ + /* Audio Codec */ + wm8904_1a: codec@1a { + compatible = "wlf,wm8904"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai1>; + #sound-dai-cells = <0>; + clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI1_MCLK1>; + clock-names = "mclk"; + reg = <0x1a>; + DCVDD-supply = <®_1p8v>; + DBVDD-supply = <®_1p8v>; + AVDD-supply = <®_1p8v>; + CPVDD-supply = <®_1p8v>; + MICVDD-supply = <®_1p8v>; + }; }; /* TODO: Verdin PCIE_1 */ @@ -88,7 +130,19 @@ vin-supply = <®_3p3v>; }; -/* TODO: Verdin I2S_1 */ +/* VERDIN I2S_1 */ +&sai1 { + #sound-dai-cells = <0>; + assigned-clocks = <&clk IMX8MP_CLK_SAI1>; + assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>; + assigned-clock-rates = <24576000>; + fsl,sai-mclk-direction-output; + status = "okay"; +}; + +&sdma2 { + status = "okay"; +}; /* Verdin UART_1 */ &uart1 { |