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Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek-lvds0-it6263.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek-lvds0-it6263.dtsi58
1 files changed, 58 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek-lvds0-it6263.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek-lvds0-it6263.dtsi
new file mode 100644
index 000000000000..acd6a388cce0
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-mek-lvds0-it6263.dtsi
@@ -0,0 +1,58 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&ldb1_phy {
+ status = "okay";
+};
+
+&ldb1 {
+ status = "okay";
+
+ lvds-channel@0 {
+ fsl,data-mapping = "jeida";
+ fsl,data-width = <24>;
+ status = "okay";
+
+ port@1 {
+ reg = <1>;
+
+ lvds0_out: endpoint {
+ remote-endpoint = <&it6263_0_in>;
+ };
+ };
+ };
+};
+
+&i2c0_mipi_lvds0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c0_mipi_lvds0>;
+ clock-frequency = <100000>;
+ status = "okay";
+
+ lvds-to-hdmi-bridge@4c {
+ compatible = "ite,it6263";
+ reg = <0x4c>;
+ reset-gpios = <&pca9557_a 6 GPIO_ACTIVE_LOW>;
+
+ port {
+ it6263_0_in: endpoint {
+ clock-lanes = <4>;
+ data-lanes = <0 1 2 3>;
+ remote-endpoint = <&lvds0_out>;
+ };
+ };
+ };
+};