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Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2-lpspi.dts')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2-lpspi.dts53
1 files changed, 53 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2-lpspi.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2-lpspi.dts
new file mode 100644
index 000000000000..2fddbdf79359
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2-lpspi.dts
@@ -0,0 +1,53 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "fsl-imx8qxp-lpddr4-arm2.dts"
+
+&iomuxc {
+
+ imx8qxp-arm2 {
+
+ pinctrl_lpspi0: lpspi0grp {
+ fsl,pins = <
+ SC_P_SPI0_SCK_ADMA_SPI0_SCK 0x0600004c
+ SC_P_SPI0_SDO_ADMA_SPI0_SDO 0x0600004c
+ SC_P_SPI0_SDI_ADMA_SPI0_SDI 0x0600004c
+ >;
+ };
+
+ pinctrl_lpspi0_cs: lpspi0cs {
+ fsl,pins = <
+ SC_P_SPI0_CS0_LSIO_GPIO1_IO08 0x21
+ >;
+ };
+ };
+};
+
+&lpspi0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ fsl,spi-num-chipselects = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lpspi0 &pinctrl_lpspi0_cs>;
+ cs-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
+ status = "okay";
+
+ flash: at45db041e@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "atmel,at45", "atmel,dataflash";
+ spi-max-frequency = <500000>;
+ reg = <0>;
+ };
+};