summaryrefslogtreecommitdiff
path: root/arch/arm/mm/proc-v7-2level.S
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mm/proc-v7-2level.S')
-rw-r--r--arch/arm/mm/proc-v7-2level.S12
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S
index a0cf0dc9f0d7..48db62324291 100644
--- a/arch/arm/mm/proc-v7-2level.S
+++ b/arch/arm/mm/proc-v7-2level.S
@@ -36,7 +36,16 @@
*
* It is assumed that:
* - we are not using split page tables
- */
+ *
+ * Cortex-A15 requires ACTLR[0] to be set from secure in order
+ * for the icache invalidation to also invalidate the BTB.
+ */
+ENTRY(cpu_v7_icinv_switch_mm)
+#ifdef CONFIG_MMU
+ mcr p15, 0, r0, c7, c5, 0 @ ICIALLU
+ /* Fall through to switch_mm... */
+#endif
+
ENTRY(cpu_v7_switch_mm)
#ifdef CONFIG_MMU
mov r2, #0
@@ -61,6 +70,7 @@ ENTRY(cpu_v7_switch_mm)
#endif
mov pc, lr
ENDPROC(cpu_v7_switch_mm)
+ENDPROC(cpu_v7_icinv_switch_mm)
/*
* cpu_v7_set_pte_ext(ptep, pte)