diff options
Diffstat (limited to 'arch/arm/boot/dts/imx6sx-sdb.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6sx-sdb.dtsi | 570 |
1 files changed, 555 insertions, 15 deletions
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dtsi b/arch/arm/boot/dts/imx6sx-sdb.dtsi index 9d70cfd40aff..f0e6181b0ce2 100644 --- a/arch/arm/boot/dts/imx6sx-sdb.dtsi +++ b/arch/arm/boot/dts/imx6sx-sdb.dtsi @@ -24,11 +24,19 @@ reg = <0x80000000 0x40000000>; }; - backlight { + backlight1 { compatible = "pwm-backlight"; pwms = <&pwm3 0 5000000>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; + fb-names = "mxs-lcdif0"; + }; + backlight2 { + compatible = "pwm-backlight"; + pwms = <&pwm4 0 5000000>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + fb-names = "mxs-lcdif1"; }; gpio-keys { @@ -49,6 +57,18 @@ }; }; + hannstar_cabc { + compatible = "hannstar,cabc"; + lvds0 { + gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; + }; + }; + + pxp_v4l2_out { + compatible = "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2"; + status = "okay"; + }; + regulators { compatible = "simple-bus"; #address-cells = <1>; @@ -63,6 +83,7 @@ regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>; + off-on-delay = <20000>; enable-active-high; }; @@ -104,6 +125,7 @@ regulator-name = "lcd-3v3"; gpio = <&gpio3 27 0>; enable-active-high; + status = "disabled"; }; reg_peri_3v3: regulator@5 { @@ -129,12 +151,49 @@ regulator-max-microvolt = <3300000>; gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; }; + + reg_vref_3v3: regulator@7 { + compatible = "regulator-fixed"; + reg = <7>; + regulator-name = "vref-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_pcie: regulator@8 { + compatible = "regulator-fixed"; + reg = <8>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie_reg>; + regulator-name = "MPCIE_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 1 0>; + regulator-always-on; + enable-active-high; + }; + + reg_can_en: regulator@9 { + compatible = "regulator-fixed"; + reg = <9>; + regulator-name = "can-en"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_can_stby: regulator@10 { + compatible = "regulator-fixed"; + reg = <10>; + regulator-name = "can-stby"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; }; sound { compatible = "fsl,imx6sx-sdb-wm8962", "fsl,imx-audio-wm8962"; model = "wm8962-audio"; - ssi-controller = <&ssi2>; + cpu-dai = <&ssi2>; audio-codec = <&codec>; audio-routing = "Headphone Jack", "HPOUTL", @@ -145,15 +204,48 @@ "IN3R", "AMIC"; mux-int-port = <2>; mux-ext-port = <6>; + codec-master; + hp-det-gpios = <&gpio1 17 1>; + }; + + sound-spdif { + compatible = "fsl,imx-audio-spdif", + "fsl,imx6sx-sdb-spdif"; + model = "imx-spdif"; + spdif-controller = <&spdif>; + spdif-out; + }; + + sii902x_reset: sii902x-reset { + compatible = "gpio-reset"; + reset-gpios = <&gpio3 27 1>; + reset-delay-us = <100000>; + #reset-cells = <0>; + status = "disabled"; }; }; +&adc1 { + vref-supply = <®_vref_3v3>; + status = "okay"; +}; + +&adc2 { + vref-supply = <®_vref_3v3>; + status = "okay"; +}; + &audmux { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_audmux>; status = "okay"; }; + +&gpc { + fsl,ldo-bypass = <1>; +}; + &fec1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet1>; @@ -176,6 +268,37 @@ }; }; +&csi1 { + status = "okay"; + + port { + csi1_ep: endpoint { + remote-endpoint = <&ov5640_ep>; + }; + }; +}; + +&csi2 { + status = "okay"; + port { + csi2_ep: endpoint { + remote-endpoint = <&vadc_ep>; + }; + }; +}; + +&dcic1 { + dcic_id = <0>; + dcic_mux = "dcic-lcdif1"; + status = "okay"; +}; + +&dcic2 { + dcic_id = <1>; + dcic_mux = "dcic-lvds"; + status = "okay"; +}; + &fec2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet2>; @@ -184,11 +307,196 @@ status = "okay"; }; +&flexcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + xceiver-supply = <®_can_stby>; + status = "okay"; +}; + +&flexcan2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan2>; + xceiver-supply = <®_can_stby>; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; + + pmic: pfuze100@08 { + compatible = "fsl,pfuze200"; + reg = <0x08>; + + regulators { + sw1a_reg: sw1ab { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw2_reg: sw2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3a_reg: sw3a { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3b_reg: sw3b { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + swbst_reg: swbst { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + }; + + snvs_reg: vsnvs { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + vref_reg: vrefddr { + regulator-boot-on; + regulator-always-on; + }; + + vgen1_reg: vgen1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + regulator-always-on; + }; + + vgen2_reg: vgen2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen3_reg: vgen3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen4_reg: vgen4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen5_reg: vgen5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen6_reg: vgen6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; + + ov5640: ov5640@3c { + compatible = "ovti,ov5640"; + reg = <0x3c>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_csi_0>; + clocks = <&clks IMX6SX_CLK_CSI>; + clock-names = "csi_mclk"; + AVDD-supply = <&vgen3_reg>; /* 2.8v */ + DVDD-supply = <&vgen2_reg>; /* 1.5v*/ + pwn-gpios = <&gpio3 28 1>; + rst-gpios = <&gpio3 27 0>; + csi_id = <0>; + mclk = <24000000>; + mclk_source = <0>; + port { + ov5640_ep: endpoint { + remote-endpoint = <&csi1_ep>; + }; + }; + }; + + sii902x@39 { + compatible = "SiI,sii902x"; + interrupt-parent = <&gpio4>; + interrupts = <21 2>; + mode_str ="1280x720M@60"; + bits-per-pixel = <16>; + resets = <&sii902x_reset>; + reg = <0x39>; + status = "disabled"; + }; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + egalax_ts@04 { + compatible = "eeti,egalax_ts"; + reg = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_egalax_int>; + interrupt-parent = <&gpio4>; + interrupts = <19 2>; + wakeup-gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>; + }; +}; + &i2c3 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; + + isl29023@44 { + compatible = "fsl,isl29023"; + reg = <0x44>; + rext = <499>; + interrupt-parent = <&gpio6>; + interrupts = <5 1>; + shared-interrupt; + }; + + mag3110@0e { + compatible = "fsl,mag3110"; + reg = <0x0e>; + position = <2>; + interrupt-parent = <&gpio6>; + interrupts = <5 1>; + shared-interrupt; + }; + + mma8451@1c { + compatible = "fsl,mma8451"; + reg = <0x1c>; + position = <1>; + interrupt-parent = <&gpio6>; + interrupts = <2 8>; + interrupt-route = <2>; + }; }; &i2c4 { @@ -209,6 +517,7 @@ PLLVDD-supply = <&vgen4_reg>; SPKVDD1-supply = <®_psu_5v>; SPKVDD2-supply = <®_psu_5v>; + amic-mono; }; }; @@ -217,9 +526,9 @@ pinctrl-0 = <&pinctrl_lcd>; lcd-supply = <®_lcd_3v3>; display = <&display0>; - status = "okay"; + status = "disabled"; - display0: display0 { + display0: display@0 { bits-per-pixel = <16>; bus-width = <24>; @@ -244,12 +553,62 @@ }; }; +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie>; + reset-gpio = <&gpio2 0 0>; + status = "okay"; +}; + +&lcdif2 { + display = <&display1>; + disp-dev = "ldb"; + status = "okay"; + display1: display@1 { + bits-per-pixel = <16>; + bus-width = <18>; + }; +}; +&ldb { + status = "okay"; + lvds-channel@0 { + fsl,data-mapping = "spwg"; + fsl,data-width = <18>; + crtc = "lcdif2"; + status = "okay"; + display-timings { + native-mode = <&timing1>; + timing1: hsd100pxn1 { + clock-frequency = <65000000>; + hactive = <1024>; + vactive = <768>; + hback-porch = <220>; + hfront-porch = <40>; + vback-porch = <21>; + vfront-porch = <7>; + hsync-len = <60>; + vsync-len = <10>; + }; + }; + }; +}; + &pwm3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; status = "okay"; }; +&pwm4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm4>; + status = "okay"; +}; + +&pxp { + status = "okay"; +}; + &snvs_poweroff { status = "okay"; }; @@ -260,7 +619,20 @@ status = "disabled"; }; +&spdif { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spdif>; + status = "okay"; +}; + &ssi2 { + assigned-clocks = <&clks IMX6SX_CLK_PLL4>, + <&clks IMX6SX_PLL4_BYPASS>, + <&clks IMX6SX_CLK_SSI2_SEL>; + assigned-clock-parents = <&clks IMX6SX_CLK_OSC>, + <&clks IMX6SX_CLK_PLL4>, + <&clks IMX6SX_CLK_PLL4_AUDIO_DIV>; + assigned-clock-rates = <737280000>, <0>, <0>; status = "okay"; }; @@ -275,12 +647,18 @@ pinctrl-0 = <&pinctrl_uart5>; uart-has-rtscts; status = "okay"; + /* for DTE mode, add below change */ + /* fsl,dte-mode;*/ + /* pinctrl-0 = <&pinctrl_uart5dte_1>; */ }; &usbotg1 { vbus-supply = <®_usb_otg1_vbus>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb_otg1_id>; + srp-disable; + hnp-disable; + adp-disable; status = "okay"; }; @@ -329,7 +707,25 @@ }; &iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog &pinctrl_can_gpios>; + imx6x-sdb { + pinctrl_hog: hoggrp { + fsl,pins = < + MX6SX_PAD_SD1_DATA0__GPIO6_IO_2 0x17059 + MX6SX_PAD_SD1_DATA3__GPIO6_IO_5 0xb000 + MX6SX_PAD_CSI_DATA03__GPIO1_IO_17 0x17059 + >; + }; + + pinctrl_can_gpios: can-gpios { + fsl,pins = < + MX6SX_PAD_QSPI1B_DATA1__GPIO4_IO_25 0x17059 + MX6SX_PAD_QSPI1B_DATA3__GPIO4_IO_27 0x17059 + >; + }; + pinctrl_audmux: audmuxgrp { fsl,pins = < MX6SX_PAD_CSI_DATA00__AUDMUX_AUD6_TXC 0x130b0 @@ -340,11 +736,38 @@ >; }; + pinctrl_csi_0: csigrp-0 { + fsl,pins = < + MX6SX_PAD_LCD1_DATA07__CSI1_MCLK 0x110b0 + MX6SX_PAD_LCD1_DATA06__CSI1_PIXCLK 0x110b0 + MX6SX_PAD_LCD1_DATA04__CSI1_VSYNC 0x110b0 + MX6SX_PAD_LCD1_DATA05__CSI1_HSYNC 0x110b0 + MX6SX_PAD_LCD1_DATA17__CSI1_DATA_0 0x110b0 + MX6SX_PAD_LCD1_DATA16__CSI1_DATA_1 0x110b0 + MX6SX_PAD_LCD1_DATA15__CSI1_DATA_2 0x110b0 + MX6SX_PAD_LCD1_DATA14__CSI1_DATA_3 0x110b0 + MX6SX_PAD_LCD1_DATA13__CSI1_DATA_4 0x110b0 + MX6SX_PAD_LCD1_DATA12__CSI1_DATA_5 0x110b0 + MX6SX_PAD_LCD1_DATA11__CSI1_DATA_6 0x110b0 + MX6SX_PAD_LCD1_DATA10__CSI1_DATA_7 0x110b0 + MX6SX_PAD_LCD1_DATA09__CSI1_DATA_8 0x110b0 + MX6SX_PAD_LCD1_DATA08__CSI1_DATA_9 0x110b0 + MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x80000000 + MX6SX_PAD_LCD1_VSYNC__GPIO3_IO_28 0x80000000 + >; + }; + + pinctrl_egalax_int: egalax_intgrp { + fsl,pins = < + MX6SX_PAD_QSPI1A_DATA3__GPIO4_IO_19 0x80000000 + >; + }; + pinctrl_enet1: enet1grp { fsl,pins = < MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0xa0b1 MX6SX_PAD_ENET1_MDC__ENET1_MDC 0xa0b1 - MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC 0xa0b1 + MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC 0xa0b9 MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0xa0b1 MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0xa0b1 MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2 0xa0b1 @@ -383,6 +806,20 @@ >; }; + pinctrl_flexcan1: flexcan1grp { + fsl,pins = < + MX6SX_PAD_QSPI1B_DQS__CAN1_TX 0x1b020 + MX6SX_PAD_QSPI1A_SS1_B__CAN1_RX 0x1b020 + >; + }; + + pinctrl_flexcan2: flexcan2grp { + fsl,pins = < + MX6SX_PAD_QSPI1B_SS1_B__CAN2_RX 0x1b020 + MX6SX_PAD_QSPI1A_DQS__CAN2_TX 0x1b020 + >; + }; + pinctrl_gpio_keys: gpio_keysgrp { fsl,pins = < MX6SX_PAD_CSI_DATA04__GPIO1_IO_18 0x17059 @@ -397,6 +834,13 @@ >; }; + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6SX_PAD_GPIO1_IO03__I2C2_SDA 0x4001b8b1 + MX6SX_PAD_GPIO1_IO02__I2C2_SCL 0x4001b8b1 + >; + }; + pinctrl_i2c3: i2c3grp { fsl,pins = < MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1 @@ -445,6 +889,25 @@ >; }; + pinctrl_mqs: mqsgrp { + fsl,pins = < + MX6SX_PAD_SD2_CLK__MQS_RIGHT 0x120b0 + MX6SX_PAD_SD2_CMD__MQS_LEFT 0x120b0 + >; + }; + + pinctrl_pcie: pciegrp { + fsl,pins = < + MX6SX_PAD_ENET1_COL__GPIO2_IO_0 0x10b0 + >; + }; + + pinctrl_pcie_reg: pciereggrp { + fsl,pins = < + MX6SX_PAD_ENET1_CRS__GPIO2_IO_1 0x10b0 + >; + }; + pinctrl_peri_3v3: peri3v3grp { fsl,pins = < MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16 0x80000000 @@ -457,6 +920,12 @@ >; }; + pinctrl_pwm4: pwm4grp-1 { + fsl,pins = < + MX6SX_PAD_SD1_DATA1__PWM4_OUT 0x110b0 + >; + }; + pinctrl_qspi2: qspi2grp { fsl,pins = < MX6SX_PAD_NAND_WP_B__QSPI2_A_DATA_0 0x70f1 @@ -474,6 +943,12 @@ >; }; + pinctrl_spdif: spdifgrp { + fsl,pins = < + MX6SX_PAD_SD4_DATA4__SPDIF_OUT 0x1b0b0 + >; + }; + pinctrl_vcc_sd3: vccsd3grp { fsl,pins = < MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059 @@ -506,6 +981,15 @@ >; }; + pinctrl_uart5dte_1: uart5dtegrp-1 { + fsl,pins = < + MX6SX_PAD_KEY_ROW3__UART5_TX 0x1b0b1 + MX6SX_PAD_KEY_COL3__UART5_RX 0x1b0b1 + MX6SX_PAD_KEY_ROW2__UART5_RTS_B 0x1b0b1 + MX6SX_PAD_KEY_COL2__UART5_CTS_B 0x1b0b1 + >; + }; + pinctrl_usb_otg1: usbotg1grp { fsl,pins = < MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x10b0 @@ -537,16 +1021,16 @@ pinctrl_usdhc3: usdhc3grp { fsl,pins = < - MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17059 - MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10059 - MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17059 - MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17059 - MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17059 - MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17059 - MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17059 - MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17059 - MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17059 - MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17059 + MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17069 + MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10071 + MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17069 + MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17069 + MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17069 + MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17069 + MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17069 + MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17069 + MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17069 + MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17069 MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 /* CD */ MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */ >; @@ -595,6 +1079,51 @@ >; }; + pinctrl_usdhc4_1: usdhc4grp-1 { + fsl,pins = < + MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059 + MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059 + MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059 + MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059 + MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059 + MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059 + MX6SX_PAD_SD4_DATA4__USDHC4_DATA4 0x17059 + MX6SX_PAD_SD4_DATA5__USDHC4_DATA5 0x17059 + MX6SX_PAD_SD4_DATA6__USDHC4_DATA6 0x17059 + MX6SX_PAD_SD4_DATA7__USDHC4_DATA7 0x17059 + >; + }; + + pinctrl_usdhc4_1_100mhz: usdhc4grp-1-100mhz { + fsl,pins = < + MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x170b9 + MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x100b9 + MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x170b9 + MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x170b9 + MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x170b9 + MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x170b9 + MX6SX_PAD_SD4_DATA4__USDHC4_DATA4 0x170b9 + MX6SX_PAD_SD4_DATA5__USDHC4_DATA5 0x170b9 + MX6SX_PAD_SD4_DATA6__USDHC4_DATA6 0x170b9 + MX6SX_PAD_SD4_DATA7__USDHC4_DATA7 0x170b9 + >; + }; + + pinctrl_usdhc4_1_200mhz: usdhc4grp-1-200mhz { + fsl,pins = < + MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x170f9 + MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x100f9 + MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x170f9 + MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x170f9 + MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x170f9 + MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x170f9 + MX6SX_PAD_SD4_DATA4__USDHC4_DATA4 0x170f9 + MX6SX_PAD_SD4_DATA5__USDHC4_DATA5 0x170f9 + MX6SX_PAD_SD4_DATA6__USDHC4_DATA6 0x170f9 + MX6SX_PAD_SD4_DATA7__USDHC4_DATA7 0x170f9 + >; + }; + pinctrl_wdog: wdoggrp { fsl,pins = < MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY 0x30b0 @@ -602,3 +1131,14 @@ }; }; }; + +&vadc { + vadc_in = <0>; + csi_id = <1>; + status = "okay"; + port { + vadc_ep: endpoint { + remote-endpoint = <&csi2_ep>; + }; + }; +}; |