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-rw-r--r--Documentation/devicetree/bindings/video/nvidia,tegra114-dc.txt2
-rw-r--r--Documentation/devicetree/bindings/video/nvidia,tegra114-hdmi.txt3
-rw-r--r--Documentation/devicetree/bindings/video/nvidia,tegra124-dc.txt2
-rw-r--r--Documentation/devicetree/bindings/video/nvidia,tegra124-hdmi.txt3
4 files changed, 8 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/video/nvidia,tegra114-dc.txt b/Documentation/devicetree/bindings/video/nvidia,tegra114-dc.txt
index b8aaf317ed0e..1c7f8a3e10cf 100644
--- a/Documentation/devicetree/bindings/video/nvidia,tegra114-dc.txt
+++ b/Documentation/devicetree/bindings/video/nvidia,tegra114-dc.txt
@@ -362,7 +362,7 @@ Example
nvidia,out-type = <TEGRA_DC_OUT_HDMI>;
nvidia,out-flags = <TEGRA_DC_OUT_HOTPLUG_HIGH TEGRA_DC_OUT_HOTPLUG_WAKE_LP0>;
nvidia,out-parent-clk = "pll_d2";
- nvidia,out-max-pixclk = <297000>;
+ nvidia,out-max-pixclk = <3367>; /* KHZ2PICOS(297000) */
nvidia,out-align = <TEGRA_DC_ALIGN_MSB>;
nvidia,out-order = <TEGRA_DC_ORDER_RED_BLUE>;
};
diff --git a/Documentation/devicetree/bindings/video/nvidia,tegra114-hdmi.txt b/Documentation/devicetree/bindings/video/nvidia,tegra114-hdmi.txt
index 83cfc2df95a0..5fd7b27fdedb 100644
--- a/Documentation/devicetree/bindings/video/nvidia,tegra114-hdmi.txt
+++ b/Documentation/devicetree/bindings/video/nvidia,tegra114-hdmi.txt
@@ -32,6 +32,7 @@ NVIDIA TEGRA114 High Definition Multimedia Interface
Required properties:
- name: Can be arbitrary, but each sibling node should have unique name.
+ - version: tmds configuration version. two tuples items needs to be written.: <major minor>
- pclk: pixel clk required in tmds table for each mode.
- pll0: See HDMI_NV_PDISP_SOR_PLL0_0 in Tegra TRM.
- pll1: See HDMI_NV_PDISP_SOR_PLL1_0 in Tegra TRM.
@@ -41,6 +42,8 @@ NVIDIA TEGRA114 High Definition Multimedia Interface
See HDMI_NV_PDISP_SOR_LANE_DRIVE_CURRENT_0 in Tegra TRM.
- peak-current: New pad controls for 28nm macro TMDS_X4_HP 8 bits per lane.
See HDMI_NV_PDISP_SOR_IO_PEAK_CURRENT_0 in Tegra TRM.
+ - pad-ctls0-mask: HDMI_NV_PDISP_SOR_PAD_CTLS0_0 register and mask.
+ - pad-ctls0-setting: HDMI_NV_PDISP_SOR_PAD_CTLS0_0 register or mask.
Example
host1x {
diff --git a/Documentation/devicetree/bindings/video/nvidia,tegra124-dc.txt b/Documentation/devicetree/bindings/video/nvidia,tegra124-dc.txt
index 3a081a29cc87..ca1f5e733bac 100644
--- a/Documentation/devicetree/bindings/video/nvidia,tegra124-dc.txt
+++ b/Documentation/devicetree/bindings/video/nvidia,tegra124-dc.txt
@@ -362,7 +362,7 @@ Example
nvidia,out-type = <TEGRA_DC_OUT_HDMI>;
nvidia,out-flags = <TEGRA_DC_OUT_HOTPLUG_HIGH TEGRA_DC_OUT_HOTPLUG_WAKE_LP0>;
nvidia,out-parent-clk = "pll_d2";
- nvidia,out-max-pixclk = <297000>;
+ nvidia,out-max-pixclk = <3367>; /* KHZ2PICOS(297000) */
nvidia,out-align = <TEGRA_DC_ALIGN_MSB>;
nvidia,out-order = <TEGRA_DC_ORDER_RED_BLUE>;
};
diff --git a/Documentation/devicetree/bindings/video/nvidia,tegra124-hdmi.txt b/Documentation/devicetree/bindings/video/nvidia,tegra124-hdmi.txt
index 9a0ccc2f5e6f..8613c36a9be3 100644
--- a/Documentation/devicetree/bindings/video/nvidia,tegra124-hdmi.txt
+++ b/Documentation/devicetree/bindings/video/nvidia,tegra124-hdmi.txt
@@ -32,6 +32,7 @@ NVIDIA TEGRA124 High Definition Multimedia Interface
Required properties:
- name: Can be arbitrary, but each sibling node should have unique name.
+ - version: tmds configuration version. two tuples items needs to be written.: <major minor>
- pclk: pixel clk required in tmds table for each mode.
- pll0: See HDMI_NV_PDISP_SOR_PLL0_0 in Tegra TRM.
- pll1: See HDMI_NV_PDISP_SOR_PLL1_0 in Tegra TRM.
@@ -41,6 +42,8 @@ NVIDIA TEGRA124 High Definition Multimedia Interface
See HDMI_NV_PDISP_SOR_LANE_DRIVE_CURRENT_0 in Tegra TRM.
- peak-current: New pad controls for 28nm macro TMDS_X4_HP 8 bits per lane.
See HDMI_NV_PDISP_SOR_IO_PEAK_CURRENT_0 in Tegra TRM.
+ - pad-ctls0-mask: HDMI_NV_PDISP_SOR_PAD_CTLS0_0 register and mask.
+ - pad-ctls0-setting: HDMI_NV_PDISP_SOR_PAD_CTLS0_0 register or mask.
Example
host1x {