diff options
| author | Stefan Agner <stefan@agner.ch> | 2017-06-08 15:34:47 -0700 |
|---|---|---|
| committer | Stefan Agner <stefan@agner.ch> | 2017-11-20 14:31:16 +0100 |
| commit | 23ed0c25201c49ab8cf12efa182a6210bbffb1b7 (patch) | |
| tree | beffd0f1f0fc150f73e731b056ecbb90d1eef17f /include | |
| parent | 7fa15058a4e7775422224e3e1075bf3cbb7933d9 (diff) | |
clk: imx7d: create clocks behind rawnand clock gate
The rawnand clock gate gates two clocks, NAND_USDHC_BUS_CLK_ROOT
and NAND_CLK_ROOT. However, the gate has been in the chain of the
latter only. This does not allow to use the NAND_USDHC_BUS_CLK_ROOT
only, e.g. as required by APBH-Bridge-DMA.
Add new clocks which represent the clock after the gate, and use a
shared clock gate to correctly model the hardware.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit 22039d150f716e4e56215d70ad23fb92caa4476e)
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/imx7d-clock.h | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/include/dt-bindings/clock/imx7d-clock.h b/include/dt-bindings/clock/imx7d-clock.h index 8691a8549ec0..be08d7790752 100644 --- a/include/dt-bindings/clock/imx7d-clock.h +++ b/include/dt-bindings/clock/imx7d-clock.h @@ -451,11 +451,12 @@ #define IMX7D_CLK_ARM 437 #define IMX7D_CKIL 438 #define IMX7D_OCOTP_CLK 439 -#define IMX7D_CAAM_CLK 440 -#define IMX7D_PXP_IPG_CLK 441 -#define IMX7D_PXP_AXI_CLK 442 -#define IMX7D_ENET1_IPG_ROOT_CLK 443 -#define IMX7D_ENET2_IPG_ROOT_CLK 444 -#define IMX7D_CLK_END 445 - +#define IMX7D_NAND_RAWNAND_CLK 440 +#define IMX7D_NAND_USDHC_BUS_RAWNAND_CLK 441 +#define IMX7D_CAAM_CLK 442 +#define IMX7D_PXP_IPG_CLK 443 +#define IMX7D_PXP_AXI_CLK 444 +#define IMX7D_ENET1_IPG_ROOT_CLK 445 +#define IMX7D_ENET2_IPG_ROOT_CLK 446 +#define IMX7D_CLK_END 447 #endif /* __DT_BINDINGS_CLOCK_IMX7D_H */ |