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authorXue Dong <xdong@nvidia.com>2013-02-13 11:46:54 -0800
committerDan Willemsen <dwillemsen@nvidia.com>2013-09-14 13:22:38 -0700
commit80491b96c462db44b8ccc6bb24377e487e89ebf7 (patch)
tree0a57f333fb8c365eed5be935c6850059c19024d3 /include/video
parentdae11ebef5d4b28455f10fa8811eb45ae8019d4b (diff)
tegra: video: add dc interlace mode support
Bug 1172562 Signed-off-by: Xue Dong <xdong@nvidia.com> Conflicts: arch/arm/mach-tegra/include/mach/dc.h drivers/video/tegra/dc/mode.c Change-Id: I9e33ae73c60e0d98c5009a2a72c243d598bf084f Signed-off-by: Xue Dong <xdong@nvidia.com> Reviewed-on: http://git-master/r/200502 GVS: Gerrit_Virtual_Submit Reviewed-by: Chao Xu <cxu@nvidia.com>
Diffstat (limited to 'include/video')
-rw-r--r--include/video/tegra_dc_ext.h9
1 files changed, 6 insertions, 3 deletions
diff --git a/include/video/tegra_dc_ext.h b/include/video/tegra_dc_ext.h
index 868bfcf34420..f86b9df4e737 100644
--- a/include/video/tegra_dc_ext.h
+++ b/include/video/tegra_dc_ext.h
@@ -79,6 +79,7 @@
#define TEGRA_DC_EXT_FLIP_FLAG_GLOBAL_ALPHA (1 << 4)
#define TEGRA_DC_EXT_FLIP_FLAG_BLOCKLINEAR (1 << 5)
#define TEGRA_DC_EXT_FLIP_FLAG_SCAN_COLUMN (1 << 6)
+#define TEGRA_DC_EXT_FLIP_FLAG_INTERLACE (1 << 7)
struct tegra_dc_ext_flip_windowattr {
__s32 index;
@@ -114,10 +115,12 @@ struct tegra_dc_ext_flip_windowattr {
__u8 global_alpha; /* requires TEGRA_DC_EXT_FLIP_FLAG_GLOBAL_ALPHA */
/* log2(blockheight) for blocklinear format */
__u8 block_height_log2;
-
- /* Leave some wiggle room for future expansion */
__u8 pad1[2];
- __u32 pad2[4];
+ __u32 offset2;
+ __u32 offset_u2;
+ __u32 offset_v2;
+ /* Leave some wiggle room for future expansion */
+ __u32 pad2[1];
};
#define TEGRA_DC_EXT_FLIP_N_WINDOWS 3