diff options
| author | Chao Xu <cxu@nvidia.com> | 2012-06-20 17:05:45 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 13:20:19 -0700 |
| commit | 088af69ebe3144a22e5d0da98548524bd8a8cf9e (patch) | |
| tree | 00f301da45eb4e0e7e82ce7409b668bfcb8bf692 /include/video | |
| parent | 98767d097570f5d26a21d393b87398aec65a0a34 (diff) | |
video: tegra: dc: add kernel blocklinear interface
Change-Id: I2cc33844d07f34b5391c927293015294b45ae125
Signed-off-by: Chao Xu <cxu@nvidia.com>
Reviewed-on: http://git-master/r/110199
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mark Stadler <mastadler@nvidia.com>
Diffstat (limited to 'include/video')
| -rw-r--r-- | include/video/tegra_dc_ext.h | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/include/video/tegra_dc_ext.h b/include/video/tegra_dc_ext.h index c0a9f0272966..868bfcf34420 100644 --- a/include/video/tegra_dc_ext.h +++ b/include/video/tegra_dc_ext.h @@ -72,11 +72,12 @@ #define TEGRA_DC_EXT_BLEND_PREMULT 1 #define TEGRA_DC_EXT_BLEND_COVERAGE 2 -#define TEGRA_DC_EXT_FLIP_FLAG_INVERT_H (1 << 0) -#define TEGRA_DC_EXT_FLIP_FLAG_INVERT_V (1 << 1) -#define TEGRA_DC_EXT_FLIP_FLAG_TILED (1 << 2) -#define TEGRA_DC_EXT_FLIP_FLAG_CURSOR (1 << 3) +#define TEGRA_DC_EXT_FLIP_FLAG_INVERT_H (1 << 0) +#define TEGRA_DC_EXT_FLIP_FLAG_INVERT_V (1 << 1) +#define TEGRA_DC_EXT_FLIP_FLAG_TILED (1 << 2) +#define TEGRA_DC_EXT_FLIP_FLAG_CURSOR (1 << 3) #define TEGRA_DC_EXT_FLIP_FLAG_GLOBAL_ALPHA (1 << 4) +#define TEGRA_DC_EXT_FLIP_FLAG_BLOCKLINEAR (1 << 5) #define TEGRA_DC_EXT_FLIP_FLAG_SCAN_COLUMN (1 << 6) struct tegra_dc_ext_flip_windowattr { @@ -111,8 +112,11 @@ struct tegra_dc_ext_flip_windowattr { __u32 buff_id_v; __u32 flags; __u8 global_alpha; /* requires TEGRA_DC_EXT_FLIP_FLAG_GLOBAL_ALPHA */ + /* log2(blockheight) for blocklinear format */ + __u8 block_height_log2; + /* Leave some wiggle room for future expansion */ - __u8 pad1[3]; + __u8 pad1[2]; __u32 pad2[4]; }; @@ -371,6 +375,7 @@ struct tegra_dc_ext_control_event_bandwidth { }; #define TEGRA_DC_EXT_CAPABILITIES_CURSOR_MODE (1 << 0) +#define TEGRA_DC_EXT_CAPABILITIES_BLOCKLINEAR (1 << 1) struct tegra_dc_ext_control_capabilities { __u32 caps; /* Leave some wiggle room for future expansion */ |