diff options
| author | Igor Nabirushkin <inabirushkin@nvidia.com> | 2015-03-16 19:13:33 +0400 |
|---|---|---|
| committer | Winnie Hsu <whsu@nvidia.com> | 2015-05-29 14:27:04 -0700 |
| commit | 7b3154608145006f8f1373ba31b4f0cc9e579054 (patch) | |
| tree | 350a1a76f7aaf0971ed24079b2c476069afe7474 /include/linux | |
| parent | e7ee0bf5d1229e6f7d507e8d8929860410f6a854 (diff) | |
misc: tegra-profiler: add unwind reason codes
Unwinding: store individual URC codes for each method.
Bug 1624134
Change-Id: I3b2045f9c9147354f3440e326fd3aeccb5e0458d
Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com>
Reviewed-on: http://git-master/r/717848
(cherry picked from commit e5ceff53d63e668a19d36196823f6c185ce48e88)
Reviewed-on: http://git-master/r/748086
GVS: Gerrit_Virtual_Submit
Reviewed-by: Andrey Trachenko <atrachenko@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/tegra_profiler.h | 38 |
1 files changed, 18 insertions, 20 deletions
diff --git a/include/linux/tegra_profiler.h b/include/linux/tegra_profiler.h index 66d5bf240c74..fffa74a7e7df 100644 --- a/include/linux/tegra_profiler.h +++ b/include/linux/tegra_profiler.h @@ -19,8 +19,8 @@ #include <linux/ioctl.h> -#define QUADD_SAMPLES_VERSION 32 -#define QUADD_IO_VERSION 17 +#define QUADD_SAMPLES_VERSION 33 +#define QUADD_IO_VERSION 18 #define QUADD_IO_VERSION_DYNAMIC_RB 5 #define QUADD_IO_VERSION_RB_MAX_FILL_COUNT 6 @@ -35,6 +35,7 @@ #define QUADD_IO_VERSION_BT_LOWER_BOUND 15 #define QUADD_IO_VERSION_STACK_OFFSET 16 #define QUADD_IO_VERSION_SECTIONS_INFO 17 +#define QUADD_IO_VERSION_UNW_METHODS_OPT 18 #define QUADD_SAMPLE_VERSION_THUMB_MODE_FLAG 17 #define QUADD_SAMPLE_VERSION_GROUP_SAMPLES 18 @@ -50,6 +51,7 @@ #define QUADD_SAMPLE_VERSION_HDR_ARCH_TIMER 30 #define QUADD_SAMPLE_VERSION_STACK_OFFSET 31 #define QUADD_SAMPLE_VERSION_SCHED_TASK_STATE 32 +#define QUADD_SAMPLE_VERSION_URCS 33 #define QUADD_MMAP_HEADER_VERSION 1 @@ -165,18 +167,13 @@ enum quadd_cpu_mode { #pragma pack(push, 1) -#define QUADD_SAMPLE_UNW_METHOD_SHIFT 0 -#define QUADD_SAMPLE_UNW_METHOD_MASK (1 << QUADD_SAMPLE_UNW_METHOD_SHIFT) +#define QUADD_SAMPLE_RES_URCS_ENABLED (1 << 0) -enum { - QUADD_UNW_METHOD_FP = 0, - QUADD_UNW_METHOD_EHT, - QUADD_UNW_METHOD_MIXED, - QUADD_UNW_METHOD_NONE, -}; +#define QUADD_SAMPLE_URC_MASK 0xff -#define QUADD_SAMPLE_URC_SHIFT 1 -#define QUADD_SAMPLE_URC_MASK (0x0f << QUADD_SAMPLE_URC_SHIFT) +#define QUADD_SAMPLE_URC_SHIFT_FP 0 +#define QUADD_SAMPLE_URC_SHIFT_UT (1 * 8) +#define QUADD_SAMPLE_URC_SHIFT_DWARF (2 * 8) enum { QUADD_URC_SUCCESS = 0, @@ -194,15 +191,13 @@ enum { QUADD_URC_PC_INCORRECT, QUADD_URC_LEVEL_TOO_DEEP, QUADD_URC_FP_INCORRECT, + QUADD_URC_NONE, QUADD_URC_MAX, }; #define QUADD_SED_IP64 (1 << 0) -#define QUADD_SED_UNW_METHOD_SHIFT 1 -#define QUADD_SED_UNW_METHOD_MASK (0x07 << QUADD_SED_UNW_METHOD_SHIFT) - -#define QUADD_SED_STACK_OFFSET_SHIFT 4 +#define QUADD_SED_STACK_OFFSET_SHIFT 1 #define QUADD_SED_STACK_OFFSET_MASK (0xffff << QUADD_SED_STACK_OFFSET_SHIFT) enum { @@ -318,11 +313,12 @@ struct quadd_debug_data { #define QUADD_HEADER_MAGIC 0x1122 -#define QUADD_HDR_UNW_METHOD_SHIFT 0 -#define QUADD_HDR_UNW_METHOD_MASK (0x07 << QUADD_HDR_UNW_METHOD_SHIFT) - +#define QUADD_HDR_BT_FP (1 << 0) +#define QUADD_HDR_BT_UT (1 << 1) +#define QUADD_HDR_BT_UT_CE (1 << 2) #define QUADD_HDR_USE_ARCH_TIMER (1 << 3) #define QUADD_HDR_STACK_OFFSET (1 << 4) +#define QUADD_HDR_BT_DWARF (1 << 5) struct quadd_header_data { u16 magic; @@ -372,10 +368,12 @@ enum { #define QUADD_PARAM_EXTRA_GET_MMAP (1 << 0) #define QUADD_PARAM_EXTRA_BT_FP (1 << 1) -#define QUADD_PARAM_EXTRA_BT_UNWIND_TABLES (1 << 2) +#define QUADD_PARAM_EXTRA_BT_UT (1 << 2) #define QUADD_PARAM_EXTRA_BT_MIXED (1 << 3) #define QUADD_PARAM_EXTRA_USE_ARCH_TIMER (1 << 4) #define QUADD_PARAM_EXTRA_STACK_OFFSET (1 << 5) +#define QUADD_PARAM_EXTRA_BT_UT_CE (1 << 6) +#define QUADD_PARAM_EXTRA_BT_DWARF (1 << 7) struct quadd_parameters { u32 freq; |