diff options
| author | Laxman Dewangan <ldewangan@nvidia.com> | 2014-02-03 15:42:24 +0530 |
|---|---|---|
| committer | Laxman Dewangan <ldewangan@nvidia.com> | 2014-02-03 06:17:31 -0800 |
| commit | ea7dea3a2c63987b6fefccece2b638aa69a2b0a1 (patch) | |
| tree | be3c070c7090e614115683d9e3c237802c2451f9 /include/dt-bindings | |
| parent | 9203bc073c3ac495d400406ee3f6fa208f087642 (diff) | |
ARM: dt-binding: make pinctrl-header to same as mainline
Make the pinctron dt-binding header to same as mainline
to make the code sync/same as mainline.
Change-Id: I5da41838ad18839cd14531f7fd946a93b9f29700
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/362831
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/pinctrl/pinctrl-tegra.h | 73 |
1 files changed, 29 insertions, 44 deletions
diff --git a/include/dt-bindings/pinctrl/pinctrl-tegra.h b/include/dt-bindings/pinctrl/pinctrl-tegra.h index 15cbd38cf512..ebafa498be0f 100644 --- a/include/dt-bindings/pinctrl/pinctrl-tegra.h +++ b/include/dt-bindings/pinctrl/pinctrl-tegra.h @@ -1,5 +1,18 @@ /* - * This header provides constants for TEGRA pinctrl bindings. + * This header provides constants for Tegra pinctrl bindings. + * + * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. + * + * Author: Laxman Dewangan <ldewangan@nvidia.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. */ #ifndef _DT_BINDINGS_PINCTRL_TEGRA_H @@ -10,51 +23,23 @@ * properties nvidia,enable-input, nvidia,tristate, nvidia,open-drain, * nvidia,lock, nvidia,rcv-sel, nvidia,high-speed-mode, nvidia,schmitt. */ -#define TEGRA_PIN_DISABLE 0 -#define TEGRA_PIN_ENABLE 1 +#define TEGRA_PIN_DISABLE 0 +#define TEGRA_PIN_ENABLE 1 -/* Input/output */ -#define TEGRA_PIN_OUTPUT 0 -#define TEGRA_PIN_INPUT 1 +#define TEGRA_PIN_PULL_NONE 0 +#define TEGRA_PIN_PULL_DOWN 1 +#define TEGRA_PIN_PULL_UP 2 -/* Pull up/down/normal */ -#define TEGRA_PIN_PUPD_NORMAL 0 -#define TEGRA_PIN_PUPD_PULL_DOWN 1 -#define TEGRA_PIN_PUPD_PULL_UP 2 -#define TEGRA_PIN_PULL_NONE 0 -#define TEGRA_PIN_PULL_DOWN 1 -#define TEGRA_PIN_PULL_UP 2 +/* Low power mode driver */ +#define TEGRA_PIN_LP_DRIVE_DIV_8 0 +#define TEGRA_PIN_LP_DRIVE_DIV_4 1 +#define TEGRA_PIN_LP_DRIVE_DIV_2 2 +#define TEGRA_PIN_LP_DRIVE_DIV_1 3 -/* Tristate/normal */ -#define TEGRA_PIN_NORMAL 0 -#define TEGRA_PIN_TRISTATE 1 - -/* Lock enable/disable */ -#define TEGRA_PIN_LOCK_DISABLE 0 -#define TEGRA_PIN_LOCK_ENABLE 1 - -/* Open drain enable/disable */ -#define TEGRA_PIN_OPEN_DRAIN_DISABLE 0 -#define TEGRA_PIN_OPEN_DRAIN_ENABLE 1 - -/* High speed mode */ -#define TEGRA_PIN_DRIVE_HIGH_SPEED_MODE_DISABLE 0 -#define TEGRA_PIN_DRIVE_HIGH_SPEED_MODE_ENABLE 1 - -/* Schmitt enable/disable*/ -#define TEGRA_PIN_DRIVE_SCHMITT_DISABLE 0 -#define TEGRA_PIN_DRIVE_SCHMITT_ENABLE 1 - -/* Low power mode */ -#define TEGRA_PIN_LP_DRIVE_DIV_8 0 -#define TEGRA_PIN_LP_DRIVE_DIV_4 1 -#define TEGRA_PIN_LP_DRIVE_DIV_2 2 -#define TEGRA_PIN_LP_DRIVE_DIV_1 3 - -#define TEGRA_PIN_SLEW_RATE_FASTEST 0 -#define TEGRA_PIN_SLEW_RATE_FAST 1 -#define TEGRA_PIN_SLEW_RATE_SLOW 2 -#define TEGRA_PIN_SLEW_RATE_SLOWEST 3 +/* Rising/Falling slew rate */ +#define TEGRA_PIN_SLEW_RATE_FASTEST 0 +#define TEGRA_PIN_SLEW_RATE_FAST 1 +#define TEGRA_PIN_SLEW_RATE_SLOW 2 +#define TEGRA_PIN_SLEW_RATE_SLOWEST 3 #endif - |