diff options
| author | Joy Wang <joyw@nvidia.com> | 2014-01-13 13:42:57 +0800 |
|---|---|---|
| committer | Bharat Nihalani <bnihalani@nvidia.com> | 2014-02-18 01:53:38 -0800 |
| commit | fcc7f6236be1b425d3ab316851f4f9e100f09a04 (patch) | |
| tree | f3083a9d44ceb81ad3e7676314ca204fb916426b /drivers/usb/host/xhci-tegra.c | |
| parent | 98b4e60c6a6eb854cd22a77273e29d33d691b55a (diff) | |
xhci: tegra: Add flexibility to enable ports
Let xusb can own ports with any combination.
Bug 1345723
Change-Id: I6532a44150bea1113ebee1483263158fb3c04117
Signed-off-by: Joy Wang <joyw@nvidia.com>
Reviewed-on: http://git-master/r/354888
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'drivers/usb/host/xhci-tegra.c')
| -rw-r--r-- | drivers/usb/host/xhci-tegra.c | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index c83c0267d437..ddc1f3b8dde9 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -90,6 +90,7 @@ _reg, readl(_base + _reg)) #define PMC_PORTMAP_MASK(map, pad) (((map) >> 4*(pad)) & 0xF) +#define GET_SS_PORTMAP(map, p) (((map) >> 4*(p)) & 0xF) #define PMC_USB_DEBOUNCE_DEL_0 0xec #define UTMIP_LINE_DEB_CNT(x) (((x) & 0xf) << 16) @@ -179,7 +180,8 @@ struct cfgtbl { u8 magic[8]; u32 SS_low_power_entry_timeout; u8 num_hsic_port; - u8 padding[139]; /* padding bytes to makeup 256-bytes cfgtbl */ + u8 ss_portmap; + u8 padding[138]; /* padding bytes to makeup 256-bytes cfgtbl */ }; struct xusb_save_regs { @@ -2189,6 +2191,14 @@ static void tegra_xhci_program_ss_pad(struct tegra_xhci_hcd *tegra, (port ? TEGRA_XUSB_SS1_PORT_MAP : TEGRA_XUSB_SS0_PORT_MAP)); writel(reg, tegra->padctl_base + padregs->ss_port_map_0); + /* Make sure the SS port capability set correctly */ + reg = readl(tegra->padctl_base + padregs->usb2_port_cap_0); + reg &= ~USB2_PORT_CAP_MASK( + GET_SS_PORTMAP(tegra->bdata->ss_portmap, port)); + reg |= USB2_PORT_CAP_HOST( + GET_SS_PORTMAP(tegra->bdata->ss_portmap, port)); + writel(reg, tegra->padctl_base + padregs->usb2_port_cap_0); + tegra_xhci_restore_dfe_context(tegra, port); tegra_xhci_restore_ctle_context(tegra, port); } @@ -2450,6 +2460,11 @@ static int load_firmware(struct tegra_xhci_hcd *tegra, bool resetARU) struct xhci_op_regs __iomem *op_regs; int pad; + /* Program SS port map config */ + cfg_tbl->ss_portmap = 0x0; + cfg_tbl->ss_portmap |= + (tegra->bdata->portmap & ((1 << XUSB_SS_PORT_COUNT) - 1)); + /* enable mbox interrupt */ writel(readl(tegra->fpci_base + XUSB_CFG_ARU_MBOX_CMD) | MBOX_INT_EN, tegra->fpci_base + XUSB_CFG_ARU_MBOX_CMD); @@ -4532,7 +4547,7 @@ static int tegra_xhci_probe2(struct tegra_xhci_hcd *tegra) unsigned port; - ret = load_firmware(tegra, true /* do reset ARU */); + ret = load_firmware(tegra, false /* do reset ARU */); if (ret < 0) { dev_err(&pdev->dev, "failed to load firmware\n"); return -ENODEV; |