diff options
| author | Shardar Shariff Md <smohammed@nvidia.com> | 2013-12-13 19:03:59 +0530 |
|---|---|---|
| committer | Shardar Mohammed <smohammed@nvidia.com> | 2013-12-27 05:24:09 -0800 |
| commit | daa273d56d9c3cfbc5ded2116bb6aaa35b884d47 (patch) | |
| tree | 921a0f8051459b9721d929bbd68e47fd39f89c1c /drivers/spi | |
| parent | e98ef6c5eb70da9d1208304f3cd45f4b5babc270 (diff) | |
arm: tegra: spi: add controller data dt support
Add DT support for spi controller data.
spi client dt node should add cdata entries
as below. Ex:
<spi-client>@<bus_num> {
...
nvidia,enable-hw-based-cs;
nvidia,cs-setup-clk-count = <10>;
nvidia,cs-hold-clk-count = <10>;
nvidia,rx-clk-tap-delay = <0>;
nvidia,tx-clk-tap-delay = <16>;
...
};
Bug 1422369
Change-Id: I8255643ef00fed486baf707edbf77b1b91586579
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/345354
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/spi-tegra114.c | 51 |
1 files changed, 50 insertions, 1 deletions
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c index d22de3528609..eb693add096b 100644 --- a/drivers/spi/spi-tegra114.c +++ b/drivers/spi/spi-tegra114.c @@ -735,7 +735,6 @@ static int tegra_spi_start_transfer_one(struct spi_device *spi, tegra_spi_writel(tspi, command1, SPI_COMMAND1); - /* possibly use the hw based chip select */ tspi->is_hw_based_cs = false; if (cdata && cdata->is_hw_based_cs && is_single_xfer && @@ -842,9 +841,46 @@ static int tegra_spi_start_transfer_one(struct spi_device *spi, return ret; } +static int tegra_spi_get_cdata_dt(struct device_node *np, + struct tegra_spi_device_controller_data *cdata_dt) +{ + int ret; + int has_cdata_entry; + + ret = of_property_read_bool(np, "nvidia,enable-hw-based-cs"); + if (ret) { + cdata_dt->is_hw_based_cs = 1; + has_cdata_entry = 1; + } + + ret = of_property_read_u32(np, "nvidia,cs-setup-clk-count", + &cdata_dt->cs_setup_clk_count); + if (!ret) + has_cdata_entry = 1; + ret = of_property_read_u32(np, "nvidia,cs-hold-clk-count", + &cdata_dt->cs_hold_clk_count); + if (!ret) + has_cdata_entry = 1; + ret = of_property_read_u32(np, "nvidia,rx-clk-tap-delay", + &cdata_dt->rx_clk_tap_delay); + if (!ret) + has_cdata_entry = 1; + ret = of_property_read_u32(np, "nvidia,tx-clk-tap-delay", + &cdata_dt->tx_clk_tap_delay); + if (!ret) + has_cdata_entry = 1; + + if (!has_cdata_entry) + return -ENOENT; + + return 0; +} + static int tegra_spi_setup(struct spi_device *spi) { struct tegra_spi_data *tspi = spi_master_get_devdata(spi->master); + struct tegra_spi_device_controller_data *cdata = spi->controller_data; + struct device_node *np = spi->dev.of_node; unsigned long val; unsigned long flags; int ret; @@ -863,6 +899,19 @@ static int tegra_spi_setup(struct spi_device *spi) BUG_ON(spi->chip_select >= MAX_CHIP_SELECT); + if (cdata == NULL) { + if (np) { + cdata = devm_kzalloc(&spi->dev, sizeof(*cdata), + GFP_KERNEL); + if (!cdata) { + dev_err(&spi->dev, "Memory alloc for cdata failed\n"); + return -ENOMEM; + } + ret = tegra_spi_get_cdata_dt(np, cdata); + if (!ret) + spi->controller_data = cdata; + } + } /* Set speed to the spi max fequency if spi device has not set */ spi->max_speed_hz = spi->max_speed_hz ? : tspi->spi_max_frequency; |