diff options
| author | Kunal Agrawal <kunala@nvidia.com> | 2012-11-05 14:55:15 +0530 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 01:13:08 -0700 |
| commit | 185cef28a197a7dce8c451a17cb5d024812c4b4b (patch) | |
| tree | a2b8073e720b9c1c080ec5340ae4adb015fcb915 /drivers/spi | |
| parent | df13b520b73015e2454ad9625e557bd2f0512b52 (diff) | |
spi: tegra11: Set MODE bits before setting CS bit
Implemented change to set the MODE bits first and then
set CS and other bits of the command register.
Bug 1168218
Change-Id: I87bd94b8fac5821f11e575e53ee5694d6cad6d2c
Signed-off-by: Kunal Agrawal <kunala@nvidia.com>
Reviewed-on: http://git-master/r/161184
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/spi-tegra11.c | 23 |
1 files changed, 13 insertions, 10 deletions
diff --git a/drivers/spi/spi-tegra11.c b/drivers/spi/spi-tegra11.c index a01d5d2024d8..69afb9e39366 100644 --- a/drivers/spi/spi-tegra11.c +++ b/drivers/spi/spi-tegra11.c @@ -737,6 +737,19 @@ static void spi_tegra_start_transfer(struct spi_device *spi, command1 = tspi->def_command1_reg; command1 |= SPI_BIT_LENGTH(bits_per_word - 1); + command1 &= ~SPI_CONTROL_MODE_MASK; + req_mode = spi->mode & 0x3; + if (req_mode == SPI_MODE_0) + command1 |= SPI_CONTROL_MODE_0; + else if (req_mode == SPI_MODE_1) + command1 |= SPI_CONTROL_MODE_1; + else if (req_mode == SPI_MODE_2) + command1 |= SPI_CONTROL_MODE_2; + else if (req_mode == SPI_MODE_3) + command1 |= SPI_CONTROL_MODE_3; + + spi_tegra_writel(tspi, command1, SPI_COMMAND1); + /* possibly use the hw based chip select */ tspi->is_hw_based_cs = false; if (cdata && cdata->is_hw_based_cs && is_single_xfer) { @@ -792,16 +805,6 @@ static void spi_tegra_start_transfer(struct spi_device *spi, spi_tegra_writel(tspi, tspi->def_command2_reg, SPI_COMMAND2); } - command1 &= ~SPI_CONTROL_MODE_MASK; - req_mode = spi->mode & 0x3; - if (req_mode == SPI_MODE_0) - command1 |= SPI_CONTROL_MODE_0; - else if (req_mode == SPI_MODE_1) - command1 |= SPI_CONTROL_MODE_1; - else if (req_mode == SPI_MODE_2) - command1 |= SPI_CONTROL_MODE_2; - else if (req_mode == SPI_MODE_3) - command1 |= SPI_CONTROL_MODE_3; } else { command1 = tspi->command1_reg; command1 &= ~SPI_BIT_LENGTH(~0); |