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authorLaxman Dewangan <ldewangan@nvidia.com>2014-06-03 15:15:36 +0530
committerTony Ly <tly@nvidia.com>2014-06-05 11:59:13 -0700
commit208df985d7c194aecfbefc35bb717647f9373ba5 (patch)
tree0931aff6b26c0ee3f2b8796fd0fec49e0f876d3a /drivers/regulator
parent92ff6eb49b90fc33fd5072025d8a9263b0eb4ca6 (diff)
regulator: palams: add support for disabling pulldown of LDOs
Add support for disabling pull down of the LDOs. this is configurable from platforms. bug 1494740 Change-Id: I8c3e02f36b3045fa25a8c881a10c686ab9c63967 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/418246 (cherry picked from commit 0894c40230017f0fbb0f463a0c5027738b1d2b1f) Reviewed-on: http://git-master/r/419339 Tested-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Diffstat (limited to 'drivers/regulator')
-rw-r--r--drivers/regulator/palmas-regulator.c50
1 files changed, 50 insertions, 0 deletions
diff --git a/drivers/regulator/palmas-regulator.c b/drivers/regulator/palmas-regulator.c
index 77a416cd5206..8fec532171e4 100644
--- a/drivers/regulator/palmas-regulator.c
+++ b/drivers/regulator/palmas-regulator.c
@@ -40,6 +40,8 @@ struct regs_info {
u8 pd_cntrl_addr;
int sleep_id;
int pd_bit;
+ u8 pd_ctrl_addr;
+ int pd_ctrl_bits;
};
static const struct regs_info palmas_regs_info[] = {
@@ -154,6 +156,8 @@ static const struct regs_info palmas_regs_info[] = {
.sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO1,
.pd_cntrl_addr = PALMAS_LDO_PD_CTRL1,
.pd_bit = PALMAS_LDO_PD_CTRL1_LDO1,
+ .pd_ctrl_addr = PALMAS_LDO_PD_CTRL1,
+ .pd_ctrl_bits = PALMAS_LDO_PD_CTRL1_LDO1,
},
{
.name = "LDO2",
@@ -163,6 +167,8 @@ static const struct regs_info palmas_regs_info[] = {
.sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO2,
.pd_cntrl_addr = PALMAS_LDO_PD_CTRL1,
.pd_bit = PALMAS_LDO_PD_CTRL1_LDO2,
+ .pd_ctrl_addr = PALMAS_LDO_PD_CTRL1,
+ .pd_ctrl_bits = PALMAS_LDO_PD_CTRL1_LDO2,
},
{
.name = "LDO3",
@@ -172,6 +178,8 @@ static const struct regs_info palmas_regs_info[] = {
.sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO3,
.pd_cntrl_addr = PALMAS_LDO_PD_CTRL1,
.pd_bit = PALMAS_LDO_PD_CTRL1_LDO3,
+ .pd_ctrl_addr = PALMAS_LDO_PD_CTRL1,
+ .pd_ctrl_bits = PALMAS_LDO_PD_CTRL1_LDO3,
},
{
.name = "LDO4",
@@ -181,6 +189,8 @@ static const struct regs_info palmas_regs_info[] = {
.sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO4,
.pd_cntrl_addr = PALMAS_LDO_PD_CTRL1,
.pd_bit = PALMAS_LDO_PD_CTRL1_LDO4,
+ .pd_ctrl_addr = PALMAS_LDO_PD_CTRL1,
+ .pd_ctrl_bits = PALMAS_LDO_PD_CTRL1_LDO4,
},
{
.name = "LDO5",
@@ -190,6 +200,8 @@ static const struct regs_info palmas_regs_info[] = {
.sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO5,
.pd_cntrl_addr = PALMAS_LDO_PD_CTRL1,
.pd_bit = PALMAS_LDO_PD_CTRL1_LDO5,
+ .pd_ctrl_addr = PALMAS_LDO_PD_CTRL1,
+ .pd_ctrl_bits = PALMAS_LDO_PD_CTRL1_LDO5,
},
{
.name = "LDO6",
@@ -199,6 +211,8 @@ static const struct regs_info palmas_regs_info[] = {
.sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO6,
.pd_cntrl_addr = PALMAS_LDO_PD_CTRL1,
.pd_bit = PALMAS_LDO_PD_CTRL1_LDO6,
+ .pd_ctrl_addr = PALMAS_LDO_PD_CTRL1,
+ .pd_ctrl_bits = PALMAS_LDO_PD_CTRL1_LDO6,
},
{
.name = "LDO7",
@@ -208,6 +222,8 @@ static const struct regs_info palmas_regs_info[] = {
.sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO7,
.pd_cntrl_addr = PALMAS_LDO_PD_CTRL1,
.pd_bit = PALMAS_LDO_PD_CTRL1_LDO7,
+ .pd_ctrl_addr = PALMAS_LDO_PD_CTRL1,
+ .pd_ctrl_bits = PALMAS_LDO_PD_CTRL1_LDO7,
},
{
.name = "LDO8",
@@ -217,6 +233,8 @@ static const struct regs_info palmas_regs_info[] = {
.sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO8,
.pd_cntrl_addr = PALMAS_LDO_PD_CTRL1,
.pd_bit = PALMAS_LDO_PD_CTRL1_LDO8,
+ .pd_ctrl_addr = PALMAS_LDO_PD_CTRL1,
+ .pd_ctrl_bits = PALMAS_LDO_PD_CTRL1_LDO8,
},
{
.name = "LDO9",
@@ -226,6 +244,8 @@ static const struct regs_info palmas_regs_info[] = {
.sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO9,
.pd_cntrl_addr = PALMAS_LDO_PD_CTRL2,
.pd_bit = PALMAS_LDO_PD_CTRL2_LDO9,
+ .pd_ctrl_addr = PALMAS_LDO_PD_CTRL2,
+ .pd_ctrl_bits = PALMAS_LDO_PD_CTRL2_LDO9,
},
{
.name = "LDO10",
@@ -235,6 +255,8 @@ static const struct regs_info palmas_regs_info[] = {
.sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO10,
.pd_cntrl_addr = PALMAS_LDO_PD_CTRL2,
.pd_bit = PALMAS_LDO_PD_CTRL2_LDO10,
+ .pd_ctrl_addr = PALMAS_LDO_PD_CTRL2,
+ .pd_ctrl_bits = PALMAS_LDO_PD_CTRL2_LDO10,
},
{
.name = "LDO11",
@@ -244,6 +266,8 @@ static const struct regs_info palmas_regs_info[] = {
.sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO11,
.pd_cntrl_addr = PALMAS_LDO_PD_CTRL2,
.pd_bit = PALMAS_LDO_PD_CTRL2_LDO11,
+ .pd_ctrl_addr = PALMAS_LDO_PD_CTRL2,
+ .pd_ctrl_bits = PALMAS_LDO_PD_CTRL2_LDO11,
},
{
.name = "LDO12",
@@ -253,6 +277,8 @@ static const struct regs_info palmas_regs_info[] = {
.sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO12,
.pd_cntrl_addr = PALMAS_LDO_PD_CTRL2,
.pd_bit = PALMAS_LDO_PD_CTRL2_LDO12,
+ .pd_ctrl_addr = PALMAS_LDO_PD_CTRL2,
+ .pd_ctrl_bits = PALMAS_LDO_PD_CTRL2_LDO12,
},
{
.name = "LDO13",
@@ -262,6 +288,8 @@ static const struct regs_info palmas_regs_info[] = {
.sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO13,
.pd_cntrl_addr = PALMAS_LDO_PD_CTRL2,
.pd_bit = PALMAS_LDO_PD_CTRL2_LDO13,
+ .pd_ctrl_addr = PALMAS_LDO_PD_CTRL2,
+ .pd_ctrl_bits = PALMAS_LDO_PD_CTRL2_LDO13,
},
{
.name = "LDO14",
@@ -271,6 +299,8 @@ static const struct regs_info palmas_regs_info[] = {
.sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO14,
.pd_cntrl_addr = PALMAS_LDO_PD_CTRL2,
.pd_bit = PALMAS_LDO_PD_CTRL2_LDO14,
+ .pd_ctrl_addr = PALMAS_LDO_PD_CTRL2,
+ .pd_ctrl_bits = PALMAS_LDO_PD_CTRL2_LDO14,
},
{
.name = "LDOLN",
@@ -280,6 +310,8 @@ static const struct regs_info palmas_regs_info[] = {
.sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOLN,
.pd_cntrl_addr = PALMAS_LDO_PD_CTRL2,
.pd_bit = PALMAS_LDO_PD_CTRL2_LDOLN,
+ .pd_ctrl_addr = PALMAS_LDO_PD_CTRL2,
+ .pd_ctrl_bits = PALMAS_LDO_PD_CTRL2_LDOLN,
},
{
.name = "LDOUSB",
@@ -289,6 +321,8 @@ static const struct regs_info palmas_regs_info[] = {
.sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOUSB,
.pd_cntrl_addr = PALMAS_LDO_PD_CTRL2,
.pd_bit = PALMAS_LDO_PD_CTRL2_LDOUSB,
+ .pd_ctrl_addr = PALMAS_LDO_PD_CTRL2,
+ .pd_ctrl_bits = PALMAS_LDO_PD_CTRL2_LDOUSB,
},
{
.name = "REGEN1",
@@ -1053,6 +1087,18 @@ static int palmas_ldo_init(struct regulator_dev *rdev,
palams_rail_pd_control(palmas, id,
reg_init->disable_active_discharge_idle);
+
+ if (reg_init->disable_pull_down) {
+ ret = palmas_update_bits(palmas, PALMAS_LDO_BASE,
+ palmas_regs_info[id].pd_ctrl_addr,
+ palmas_regs_info[id].pd_ctrl_bits, 0);
+ if (ret < 0) {
+ dev_err(palmas->dev,
+ "LDO_PD_CTRL 0x%02x update failed: %d\n",
+ palmas_regs_info[id].pd_ctrl_addr, ret);
+ return;
+ }
+ }
return 0;
}
@@ -1322,6 +1368,10 @@ static void palmas_dt_to_pdata(struct device *dev,
of_property_read_bool(palmas_matches[idx].of_node,
"ti,warm-reset");
+ pdata->reg_init[idx]->disable_pull_down =
+ of_property_read_bool(palmas_matches[idx].of_node,
+ "ti,disable-pull-down");
+
ret = of_property_read_u32(palmas_matches[idx].of_node,
"ti,roof-floor", &prop);
/* EINVAL: Property not found */