diff options
| author | Alex Frid <afrid@nvidia.com> | 2014-01-21 16:55:43 -0800 |
|---|---|---|
| committer | Aleksandr Frid <afrid@nvidia.com> | 2014-01-29 17:00:13 -0800 |
| commit | 1f7ae2d2c4f2bde25cdc33ffab3f63421fc8788f (patch) | |
| tree | c42cdcef902eaa69a9eb151a985a6a70efe3c16d /drivers/regulator | |
| parent | e7143e1500ef8662f45d90ccfe720be4622eed94 (diff) | |
regulator: Move checks for DFLL bypass callbacks
Moved checking for bypass callbacks initialization from DFLL bypass
regulator probe to the get/set voltage interfaces entry. If callbacks
are not installed get_voltage interface returns initial fixed voltage,
and set_voltage succeeds only when requested voltage is the same as
initial one.
Bug 1442709
Change-Id: Ia5239a3e19d7dc34d68394b3717fc7ff28860248
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/358584
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'drivers/regulator')
| -rw-r--r-- | drivers/regulator/tegra-dfll-bypass-regulator.c | 25 |
1 files changed, 18 insertions, 7 deletions
diff --git a/drivers/regulator/tegra-dfll-bypass-regulator.c b/drivers/regulator/tegra-dfll-bypass-regulator.c index 3b5a2bc8ea58..dc354b375d49 100644 --- a/drivers/regulator/tegra-dfll-bypass-regulator.c +++ b/drivers/regulator/tegra-dfll-bypass-regulator.c @@ -1,6 +1,6 @@ /* * - * Copyright (c) 2013 NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2013-2014 NVIDIA CORPORATION. All rights reserved. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and @@ -38,6 +38,19 @@ static int tegra_dfll_bypass_set_voltage(struct regulator_dev *reg, int ret, delay; struct tegra_dfll_bypass_regulator *tdb = rdev_get_drvdata(reg); + /* + * Before DFLL is ready, only initial voltage is supplied + * (may not be on exact selector boundary) + */ + if (!tdb->pdata->set_bypass_sel || !tdb->pdata->dfll_data) { + if (min_uV == tdb->pdata->reg_init_data->constraints.init_uV) { + *selector = regulator_map_voltage_linear( + reg, min_uV, min_uV + tdb->desc.uV_step); + return 0; + } + return -EINVAL; + } + ret = regulator_map_voltage_linear(reg, min_uV, max_uV); if (ret < 0) { dev_err(tdb->dev, "failed map [%duV, %duV]\n", min_uV, max_uV); @@ -65,6 +78,10 @@ static int tegra_dfll_bypass_get_voltage(struct regulator_dev *reg) int sel; struct tegra_dfll_bypass_regulator *tdb = rdev_get_drvdata(reg); + /* Before DFLL is ready, only initial voltage is supplied */ + if (!tdb->pdata->get_bypass_sel || !tdb->pdata->dfll_data) + return tdb->pdata->reg_init_data->constraints.init_uV; + sel = tdb->pdata->get_bypass_sel(tdb->pdata->dfll_data); if (sel < 0) { dev_err(tdb->dev, "failed to get selector\n"); @@ -139,12 +156,6 @@ static int tegra_dfll_bypass_probe(struct platform_device *pdev) return -ENODATA; } - if (!pdata->set_bypass_sel || !pdata->get_bypass_sel || - !pdata->dfll_data) { - dev_err(&pdev->dev, "Invalid platform data\n"); - return -EINVAL; - } - tdb = devm_kzalloc(&pdev->dev, sizeof(*tdb), GFP_KERNEL); if (!tdb) { dev_err(&pdev->dev, "Memory allocation failed\n"); |