diff options
| author | Jay Agarwal <jagarwal@nvidia.com> | 2014-01-06 15:59:18 +0530 |
|---|---|---|
| committer | Jay Agarwal <jagarwal@nvidia.com> | 2014-01-07 03:39:47 -0800 |
| commit | 9e81b72520846f64e935ae07da362394f8386dd7 (patch) | |
| tree | 3b0d6d55ce3978d5c9372484dc1e4cc40ca2d7e1 /drivers/pci | |
| parent | e3df216ae143ddbbe8280a47743d849a6b932e1a (diff) | |
pcie: host: tegra: Disable msi for port driver
MSI for port driver results in panic, so disabled
Bug 1421847
Change-Id: I5e9e10ad80cbf86d763be11b3f473ae7cea9f772
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/351374
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/host/pci-tegra.c | 21 |
1 files changed, 15 insertions, 6 deletions
diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c index 359c29da4695..c8417a096cc9 100644 --- a/drivers/pci/host/pci-tegra.c +++ b/drivers/pci/host/pci-tegra.c @@ -1394,15 +1394,23 @@ retry: return false; } -static void tegra_pcie_apply_sw_war(int index) +static void tegra_pcie_apply_sw_war(int index, bool enum_done) { unsigned int data; + struct pci_dev *pdev = NULL; PR_FUNC_LINE; - /* WAR for Eye diagram failure on lanes for T124 platforms */ - data = rp_readl(NV_PCIE2_RP_ECTL_1_R2, index); - data |= PCIE2_RP_ECTL_1_R2_TX_DRV_CNTL_1C; - rp_writel(data, NV_PCIE2_RP_ECTL_1_R2, index); + if (enum_done) { + /* disable msi for port driver to avoid panic */ + for_each_pci_dev(pdev) + if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT) + pdev->msi_enabled = 0; + } else { + /* WAR for Eye diagram failure on lanes for T124 platforms */ + data = rp_readl(NV_PCIE2_RP_ECTL_1_R2, index); + data |= PCIE2_RP_ECTL_1_R2_TX_DRV_CNTL_1C; + rp_writel(data, NV_PCIE2_RP_ECTL_1_R2, index); + } } /* Enable various features of root port */ @@ -1436,7 +1444,7 @@ static void tegra_pcie_enable_rp_features(int index) data |= PCIE2_RP_VEND_CTL1_ERPT; rp_writel(data, NV_PCIE2_RP_VEND_CTL1, index); - tegra_pcie_apply_sw_war(index); + tegra_pcie_apply_sw_war(index, false); } static void tegra_pcie_disable_ctlr(int index) @@ -1739,6 +1747,7 @@ static void tegra_pcie_enable_features(void) tegra_pcie_pll_pdn(); tegra_pcie_enable_aspm(); + tegra_pcie_apply_sw_war(0, true); } static int __init tegra_pcie_init(void) |