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authorBryan Wu <pengw@nvidia.com>2014-09-24 16:40:17 -0700
committerWinnie Hsu <whsu@nvidia.com>2015-01-07 18:06:30 -0800
commit81504e87c7555cfe3248c4168a59ecd1646357ab (patch)
treec96be6879238b9618b5a5188a8dfdaca2f2b2668 /drivers/media/platform/soc_camera/tegra_camera/vi2.c
parent5cc760088433a2b55c0f9d02b5279732eda335b5 (diff)
media: tegra_v4l2_camera: disable line timeout
Disable line timeout, since some sensor like IMX208 doesn't work with line timeout enabled. Bug 1560636 Change-Id: I38e9a03e04ca206cbb65c13829c567d0c0de1c6c Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/539004 Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> (cherry picked from commit 8cca4a716c25cecbbc7455d5dd92f3e7fc074b07) Reviewed-on: http://git-master/r/665997 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Diffstat (limited to 'drivers/media/platform/soc_camera/tegra_camera/vi2.c')
-rw-r--r--drivers/media/platform/soc_camera/tegra_camera/vi2.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/media/platform/soc_camera/tegra_camera/vi2.c b/drivers/media/platform/soc_camera/tegra_camera/vi2.c
index 8937eb813ea7..ec42bb96090b 100644
--- a/drivers/media/platform/soc_camera/tegra_camera/vi2.c
+++ b/drivers/media/platform/soc_camera/tegra_camera/vi2.c
@@ -557,6 +557,7 @@ static int vi2_capture_setup_csi_0(struct tegra_camera_dev *cam,
TC_VI_REG_WT(cam, TEGRA_CSI_PIXEL_STREAM_PPA_COMMAND, 0xf007);
TC_VI_REG_WT(cam, TEGRA_CSI_PIXEL_STREAM_A_CONTROL1, 0x11);
TC_VI_REG_WT(cam, TEGRA_CSI_PIXEL_STREAM_A_GAP, 0x140000);
+ TC_VI_REG_WT(cam, TEGRA_CSI_PIXEL_STREAM_A_EXPECTED_FRAME, 0x0);
TC_VI_REG_WT(cam, TEGRA_CSI_INPUT_STREAM_A_CONTROL,
0x3f0000 | (pdata->lanes - 1));
@@ -634,6 +635,7 @@ static int vi2_capture_setup_csi_1(struct tegra_camera_dev *cam,
TC_VI_REG_WT(cam, TEGRA_CSI_PIXEL_STREAM_PPB_COMMAND, 0xf007);
TC_VI_REG_WT(cam, TEGRA_CSI_PIXEL_STREAM_B_CONTROL1, 0x11);
TC_VI_REG_WT(cam, TEGRA_CSI_PIXEL_STREAM_B_GAP, 0x140000);
+ TC_VI_REG_WT(cam, TEGRA_CSI_PIXEL_STREAM_B_EXPECTED_FRAME, 0x0);
TC_VI_REG_WT(cam, TEGRA_CSI_INPUT_STREAM_B_CONTROL,
0x3f0000 | (pdata->lanes - 1));