diff options
author | Hiroshi Doyu <hdoyu@nvidia.com> | 2013-07-05 11:22:03 +0300 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 13:40:46 -0700 |
commit | e6af67ee260236eaff61243b2cf60881c67dd623 (patch) | |
tree | 13d53294e3e8e09b954ab150dac6f6db57589c05 /drivers/iommu | |
parent | 35144e0de4b8acfe83c8deb50d35813c58fc3487 (diff) |
iommu/tegra: smmu: TLB_ACTIVE_LINES 0x20 for T124
Set TLB_ACTIVE_LINES 0x20 for T124
Bug 1320358
Change-Id: I2f1abcd0677b6ff35056d79bf8c5c829223944b1
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/260048
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'drivers/iommu')
-rw-r--r-- | drivers/iommu/tegra-smmu.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c index c916be780611..aa910323f09b 100644 --- a/drivers/iommu/tegra-smmu.c +++ b/drivers/iommu/tegra-smmu.c @@ -73,7 +73,7 @@ enum { #define SMMU_TLB_CONFIG_HIT_UNDER_MISS__ENABLE (1 << 29) #define SMMU_TLB_CONFIG_ACTIVE_LINES__VALUE 0x10 -#define SMMU_TLB_CONFIG_RESET_VAL 0x20000010 +#define SMMU_TLB_CONFIG_RESET_VAL 0x20000000 #define SMMU_TLB_RR_ARB (1 << 28) #define SMMU_PTC_CONFIG_CACHE__ENABLE (1 << 29) @@ -573,8 +573,12 @@ static void smmu_setup_regs(struct smmu_device *smmu) val = SMMU_TLB_CONFIG_RESET_VAL; if (IS_ENABLED(CONFIG_ARCH_TEGRA_12x_SOC) && - (tegra_get_chipid() == TEGRA_CHIPID_TEGRA12)) + (tegra_get_chipid() == TEGRA_CHIPID_TEGRA12)) { val |= SMMU_TLB_RR_ARB; + val |= SMMU_TLB_CONFIG_ACTIVE_LINES__VALUE << 1; + } else { + val |= SMMU_TLB_CONFIG_ACTIVE_LINES__VALUE; + } smmu_write(smmu, val, SMMU_CACHE_CONFIG(_TLB)); |