diff options
| author | Hiroshi Doyu <hdoyu@nvidia.com> | 2013-10-11 11:19:28 +0300 |
|---|---|---|
| committer | Hiroshi Doyu <hdoyu@nvidia.com> | 2013-10-15 21:26:53 -0700 |
| commit | 9b4634e36ed3f1dcd5a48cb4110b49b236444f04 (patch) | |
| tree | 7cf13f4ecfe250f29f1708aa14b83c91e21fe793 /drivers/iommu | |
| parent | d35bf5f8ed1faa7354b869d2abf999224e9d53dd (diff) | |
ARM: tegra: Redefine SWGROUP ID
Redefine SWGROUP ID for the future chips with more HWAs.
Also modified how to calculate MC_SMMU_<SWGROUP ID>_ASID_0 offset from
ID in SMMU in order not to break git bisctability.
Change-Id: If7239e626fba6e935a48b525897ed7e592882a0a
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/299346
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/iommu')
| -rw-r--r-- | drivers/iommu/tegra-smmu.c | 26 |
1 files changed, 16 insertions, 10 deletions
diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c index a674f6473c17..a1673691b83f 100644 --- a/drivers/iommu/tegra-smmu.c +++ b/drivers/iommu/tegra-smmu.c @@ -303,15 +303,21 @@ static const u32 smmu_asid_security_ofs[] = { SMMU_ASID_SECURITY_7, }; -static size_t tegra_smmu_get_offset_base(int id) +static size_t tegra_smmu_get_offset(int id) { - if (!(id & BIT(5))) - return SMMU_SWGRP_ASID_BASE; - - if (id & BIT(4)) - return 0xa88 - SWGID_DC12 * sizeof(u32); + switch (id) { + case SWGID_DC14: + return 0x490; + case SWGID_DC12: + return 0xa88; + case SWGID_AFI...SWGID_ISP: + case SWGID_MPE...SWGID_PPCS1: + return (id - SWGID_AFI) * sizeof(u32) + SMMU_AFI_ASID; + case SWGID_SDMMC1A...63: + return (id - SWGID_SDMMC1A) * sizeof(u32) + 0xa94; + }; - return 0x490 - SWGID_DC14 * sizeof(u32); + BUG(); } /* @@ -480,7 +486,7 @@ static int __smmu_client_set_hwgrp(struct smmu_client *c, u64 map, int on) if (i == SWGID_AFI) continue; - offs = i * sizeof(u32) + tegra_smmu_get_offset_base(i); + offs = tegra_smmu_get_offset(i); val = smmu_read(smmu, offs); val &= ~3; /* always overwrite ASID */ @@ -1818,10 +1824,10 @@ static int tegra_smmu_probe(struct platform_device *pdev) smmu->swgids = 0x0000000001b659fe; if (IS_ENABLED(CONFIG_ARCH_TEGRA_14x_SOC) && (tegra_get_chipid() == TEGRA_CHIPID_TEGRA14)) - smmu->swgids = 0x00000020018659fe; + smmu->swgids = 0x0000000001865bfe; if (IS_ENABLED(CONFIG_ARCH_TEGRA_12x_SOC) && (tegra_get_chipid() == TEGRA_CHIPID_TEGRA12)) { - smmu->swgids = 0x06f9000001ffc9cf; + smmu->swgids = 0x00000001fffecdcf; smmu->num_translation_enable = 4; smmu->num_asid_security = 8; smmu->ptc_cache_size = SZ_32K; |