diff options
| author | Chaitanya Bandi <bandik@nvidia.com> | 2013-07-05 16:15:28 +0530 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 13:43:32 -0700 |
| commit | 797377472bff473415b69186d3d78d76997224bd (patch) | |
| tree | f4bde73c5b5ae4dab6861a91133a84f184ab6e60 /drivers/i2c | |
| parent | d985fc4dc48acccd99e17e7a2fefe7a5876aef9b (diff) | |
i2c: tegra: Add appropriate clk divisor for FM Plus mode
Added appropriate clock divisor for FM Plus mode.
Bug 1318578
Change-Id: I5f5d0fdbcb3df54f6ca74b752c81b00ab8841f05
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
(cherry picked from commit 01faecda1d6ab479ada1f12ada3da4fbbe1fb7e1)
Reviewed-on: http://git-master/r/266039
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Diffstat (limited to 'drivers/i2c')
| -rw-r--r-- | drivers/i2c/busses/i2c-tegra.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 356d5a0a0563..59ed0f37b9f6 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -155,6 +155,7 @@ struct tegra_i2c_chipdata { bool has_clk_divisor_std_fast_mode; bool has_continue_xfer_support; u16 clk_divisor_std_fast_mode; + u16 clk_divisor_fast_plus_mode; u16 clk_divisor_hs_mode; int clk_multiplier_hs_mode; bool has_config_load_reg; @@ -217,6 +218,7 @@ struct tegra_i2c_dev { bool is_clkon_always; bool is_high_speed_enable; u16 hs_master_code; + u16 clk_divisor_non_hs_mode; bool use_single_xfer_complete; const struct tegra_i2c_chipdata *chipdata; int scl_gpio; @@ -623,7 +625,7 @@ static void tegra_i2c_set_clk_rate(struct tegra_i2c_dev *i2c_dev) * (i2c_dev->chipdata->clk_divisor_hs_mode + 1); else clk_multiplier = I2C_CLK_MULTIPLIER_STD_FAST_MODE - * (i2c_dev->chipdata->clk_divisor_std_fast_mode + 1); + * (i2c_dev->clk_divisor_non_hs_mode + 1); clk_set_rate(i2c_dev->div_clk, i2c_dev->bus_clk_rate * clk_multiplier); @@ -658,7 +660,7 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) clk_divisor |= i2c_dev->chipdata->clk_divisor_hs_mode; if (i2c_dev->chipdata->has_clk_divisor_std_fast_mode) - clk_divisor |= i2c_dev->chipdata->clk_divisor_std_fast_mode + clk_divisor |= i2c_dev->clk_divisor_non_hs_mode << I2C_CLK_DIVISOR_STD_FAST_MODE_SHIFT; i2c_writel(i2c_dev, clk_divisor, I2C_CLK_DIVISOR); @@ -1282,6 +1284,7 @@ static struct tegra_i2c_chipdata tegra114_i2c_chipdata = { .has_fast_clock = false, .has_clk_divisor_std_fast_mode = true, .clk_divisor_std_fast_mode = 0x19, + .clk_divisor_fast_plus_mode = 0x10, .clk_divisor_hs_mode = 1, .clk_multiplier_hs_mode = 3, .has_config_load_reg = false, @@ -1295,6 +1298,7 @@ static struct tegra_i2c_chipdata tegra148_i2c_chipdata = { .has_fast_clock = false, .has_clk_divisor_std_fast_mode = true, .clk_divisor_std_fast_mode = 0x19, + .clk_divisor_fast_plus_mode = 0x19, .clk_divisor_hs_mode = 1, .clk_multiplier_hs_mode = 3, .has_config_load_reg = true, @@ -1444,6 +1448,11 @@ static int tegra_i2c_probe(struct platform_device *pdev) i2c_dev->is_clkon_always = pdata->is_clkon_always; i2c_dev->bus_clk_rate = pdata->bus_clk_rate ? pdata->bus_clk_rate: 100000; i2c_dev->is_high_speed_enable = pdata->is_high_speed_enable; + i2c_dev->clk_divisor_non_hs_mode = + i2c_dev->chipdata->clk_divisor_std_fast_mode; + if (i2c_dev->bus_clk_rate == 1000000) + i2c_dev->clk_divisor_non_hs_mode = + i2c_dev->chipdata->clk_divisor_fast_plus_mode; i2c_dev->msgs = NULL; i2c_dev->msgs_num = 0; i2c_dev->is_dvc = pdata->is_dvc; |