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authorTirumalesh Chalamarla <tchalamarla@cavium.com>2015-06-26 12:12:23 -0700
committerKevin Hilman <khilman@linaro.org>2015-07-08 14:24:57 -0700
commitefc5120b8259243fa945d0028450c0a7a5a4b9ef (patch)
tree062e4a4b6db8fd463e7edfdc691a45e16fc41587 /arch
parent8dfaf05682ebb9be8aaf29538f1acf89d885ef44 (diff)
GICv3: Add ITS entry to THUNDER dts
The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on Thunder SoCs by adding an entry to DT. Signed-off-by: Tirumalesh Chalamarla <tchalamarla@cavium.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/cavium/thunder-88xx.dtsi9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
index d8c0bdc51882..9cb7cf94284a 100644
--- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
+++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi
@@ -376,10 +376,19 @@
gic0: interrupt-controller@8010,00000000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
interrupt-controller;
reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */
<0x8010 0x80000000 0x0 0x600000>; /* GICR */
interrupts = <1 9 0xf04>;
+
+ its: gic-its@8010,00020000 {
+ compatible = "arm,gic-v3-its";
+ msi-controller;
+ reg = <0x8010 0x20000 0x0 0x200000>;
+ };
};
uaa0: serial@87e0,24000000 {