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authorBibek Basu <bbasu@nvidia.com>2016-11-10 15:48:17 +0530
committerWinnie Hsu <whsu@nvidia.com>2016-11-30 10:39:43 -0800
commitb8491114a4a0fe7a675c03d600003ea434c33a96 (patch)
tree113dd6a42df30c79cb5079b4dafac688271c8972 /arch
parent6454f3735146944761701de980bd6205dc979c15 (diff)
dvfs: tegra: Validate CLDVFS register address
Bug 1783583 Change-Id: I8b0e865db02c00f741dafb473d4bd39c5075f23f Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/1173469 (cherry picked from commit 453a77c5cd9a1316307458203365f9eb5bda62de) Reviewed-on: http://git-master/r/1174714 (cherry picked from commit f2ce702f49c5631e8a7cbda6fbf09140f8fb55d9) Reviewed-on: http://git-master/r/1239794 (cherry picked from commit f62bd56958ca743d512f757555e4a3b66f4c9cff) Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/1251020 GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/tegra_cl_dvfs.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/tegra_cl_dvfs.c b/arch/arm/mach-tegra/tegra_cl_dvfs.c
index 6dd7712b7961..0b2f50a0e8d2 100644
--- a/arch/arm/mach-tegra/tegra_cl_dvfs.c
+++ b/arch/arm/mach-tegra/tegra_cl_dvfs.c
@@ -150,6 +150,8 @@
#define CL_DVFS_OUTPUT_LUT 0x200
+#define CL_DVFS_APERTURE 0x400
+
#define CL_DVFS_CALIBR_TIME 40000
#define CL_DVFS_OUTPUT_PENDING_TIMEOUT 1000
#define CL_DVFS_OUTPUT_RAMP_DELAY 100
@@ -3243,6 +3245,9 @@ static ssize_t cl_register_write(struct file *file,
if (sscanf(buf, "[0x%x] = 0x%x", &offs, &val) != 2)
return -1;
+ if (offs >= CL_DVFS_APERTURE)
+ return -1;
+
clk_enable(cld->soc_clk);
cl_dvfs_writel(cld, val, offs & (~0x3));
clk_disable(cld->soc_clk);