diff options
| author | Deepak Nibade <dnibade@nvidia.com> | 2014-03-11 16:06:31 +0530 |
|---|---|---|
| committer | Deepak Nibade <dnibade@nvidia.com> | 2014-03-13 11:01:40 +0530 |
| commit | 50a3a706c880500ec305e7af51bd5f2363a8cc44 (patch) | |
| tree | 5048357e0f00ac220b671942e210d41d0c739a5c /arch/sparc | |
| parent | 40a66a5c983a8bf93a8860bd9500bfea83411e08 (diff) | |
| parent | 6969595f011b46b49c3f1b9e0bd7da27768c1fd9 (diff) | |
Merge branch 'linux-3.10.33' into dev-kernel-3.10
Bug 1456092
Change-Id: I3021247ec68a3c2dddd9e98cde13d70a45191d53
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Diffstat (limited to 'arch/sparc')
| -rw-r--r-- | arch/sparc/include/asm/pgtable_64.h | 4 | ||||
| -rw-r--r-- | arch/sparc/net/bpf_jit_comp.c | 17 |
2 files changed, 16 insertions, 5 deletions
diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/pgtable_64.h index 7619f2f792af..dfb0019bf05b 100644 --- a/arch/sparc/include/asm/pgtable_64.h +++ b/arch/sparc/include/asm/pgtable_64.h @@ -616,7 +616,7 @@ static inline unsigned long pte_present(pte_t pte) } #define pte_accessible pte_accessible -static inline unsigned long pte_accessible(pte_t a) +static inline unsigned long pte_accessible(struct mm_struct *mm, pte_t a) { return pte_val(a) & _PAGE_VALID; } @@ -806,7 +806,7 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr, * SUN4V NOTE: _PAGE_VALID is the same value in both the SUN4U * and SUN4V pte layout, so this inline test is fine. */ - if (likely(mm != &init_mm) && pte_accessible(orig)) + if (likely(mm != &init_mm) && pte_accessible(mm, orig)) tlb_batch_add(mm, addr, ptep, orig, fullmm); } diff --git a/arch/sparc/net/bpf_jit_comp.c b/arch/sparc/net/bpf_jit_comp.c index d36a85ebb5e0..fd95862c65aa 100644 --- a/arch/sparc/net/bpf_jit_comp.c +++ b/arch/sparc/net/bpf_jit_comp.c @@ -497,9 +497,20 @@ void bpf_jit_compile(struct sk_filter *fp) case BPF_S_ALU_MUL_K: /* A *= K */ emit_alu_K(MUL, K); break; - case BPF_S_ALU_DIV_K: /* A /= K */ - emit_alu_K(MUL, K); - emit_read_y(r_A); + case BPF_S_ALU_DIV_K: /* A /= K with K != 0*/ + if (K == 1) + break; + emit_write_y(G0); +#ifdef CONFIG_SPARC32 + /* The Sparc v8 architecture requires + * three instructions between a %y + * register write and the first use. + */ + emit_nop(); + emit_nop(); + emit_nop(); +#endif + emit_alu_K(DIV, K); break; case BPF_S_ALU_DIV_X: /* A /= X; */ emit_cmpi(r_X, 0); |