diff options
author | Hridya <hvalsaraju@nvidia.com> | 2014-06-06 15:43:03 -0700 |
---|---|---|
committer | Mandar Padmawar <mpadmawar@nvidia.com> | 2014-06-12 02:07:35 -0700 |
commit | ce23cb40c14613926e9241033789a11bf91f3c40 (patch) | |
tree | 2844e5dbbff73678aaa64dc6b737303189fb70ef /arch/arm64 | |
parent | 4612c855582841ea4670bcfa5c6912c050aa3438 (diff) |
arm64: tegra132: tn8: change Vret to .55V for P1761 and P1765
Bug 1442659
Change retention voltage to .55V for P1761/P1765
Change-Id: Ica3947771a0379ec2177dc8cf819527629f19c5c
Signed-off-by: Hridya <hvalsaraju@nvidia.com>
Reviewed-on: http://git-master/r/420227
Reviewed-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>
Diffstat (limited to 'arch/arm64')
-rw-r--r-- | arch/arm64/boot/dts/tegra132-tn8-p1761-1270-a03.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/tegra132-tn8-p1761-1270-a03.dts b/arch/arm64/boot/dts/tegra132-tn8-p1761-1270-a03.dts index b4a8762fe5f6..f18980f3b6c4 100644 --- a/arch/arm64/boot/dts/tegra132-tn8-p1761-1270-a03.dts +++ b/arch/arm64/boot/dts/tegra132-tn8-p1761-1270-a03.dts @@ -50,7 +50,7 @@ denver_cpuidle_pmic { type = <4>; /* TI TPS65913 2.3 */ - retention-voltage = <16>; + retention-voltage = <11>; /* vret = .55V */ lock = <0>; }; }; |