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| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2020-09-18 16:13:50 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2020-09-18 16:13:50 +0200 |
| commit | efdf797b2b091554bad3e2b6dc88631e23e879c2 (patch) | |
| tree | 525a4ce8744f559958d42baa66bf8f73de4eed62 /arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-ixora-v1.1.dtsi | |
| parent | 843b84fd822ffdd9b4b058b0f2bcd8faf5a850b9 (diff) | |
arm64: dts: freescale: fsl-imx8mm-verdin: correct ldo1/ldo2 voltage
Correct ldo1/ldo2 voltage as below:
ldo1 --NVCC_SNVS_1V8
ldo2 --VDD_SNVS_0V8
Analogous to commit 96c179b63e7b ("MLK-23275-1: ARM64: dts: freescale: fsl-imx8mm-evk: correct ldo1/ldo2 voltage")
from NXP's downstream BSP.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis-ixora-v1.1.dtsi')
0 files changed, 0 insertions, 0 deletions