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authorYauhen Kharuzhy <jekhor@gmail.com>2011-01-06 13:04:33 +0900
committerKukjin Kim <kgene.kim@samsung.com>2011-01-06 14:09:18 +0900
commit95d6791b4f8aad51caea657236234f21b50a4559 (patch)
tree875c6ef6081b5f422f78eeb6c62fc8341cf4d96a /arch/arm/plat-s3c24xx
parent387c31c7e5c9805b0aef8833d1731a5fe7bdea14 (diff)
ARM: S3C24XX: Add address map and clock definitions for HSMMC0
Define maps for HSMMC devices. S3C2443 has one HSMMC device with base address 0x4A800000. S3C2416 has HSMMC0 at 0x4AC00000 and HSMMC1 at 0x4A800000. So suppose that S3C2443 has only HSMMC1. Define clock for hsmmc0 device and register it. Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-s3c24xx')
-rw-r--r--arch/arm/plat-s3c24xx/s3c2443-clock.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/plat-s3c24xx/s3c2443-clock.c b/arch/arm/plat-s3c24xx/s3c2443-clock.c
index 461f070eb62d..82f2d4a39291 100644
--- a/arch/arm/plat-s3c24xx/s3c2443-clock.c
+++ b/arch/arm/plat-s3c24xx/s3c2443-clock.c
@@ -271,7 +271,7 @@ static struct clk init_clocks[] = {
.ctrlbit = S3C2443_HCLKCON_DMA5,
}, {
.name = "hsmmc",
- .id = 0,
+ .id = 1,
.parent = &clk_h,
.enable = s3c2443_clkcon_enable_h,
.ctrlbit = S3C2443_HCLKCON_HSMMC,