diff options
author | Varun Wadekar <vwadekar@nvidia.com> | 2014-02-09 23:49:13 -0800 |
---|---|---|
committer | Varun Wadekar <vwadekar@nvidia.com> | 2014-02-09 23:51:11 -0800 |
commit | f950aa05f2443494d3952fa3970eed83549d6943 (patch) | |
tree | 2d4b4d7d25ada8085b885a99dd1f4f44321a07ed /arch/arm/mm | |
parent | bcb186075677a767c07a89b3bde1f34cc0d788ee (diff) |
Revert "ARM: tegra: trustzone: Single kernel to work in both secure and non-secure mode."
This reverts commit 7f93a0dddf39f372c064f772f9af6903e91aaacf as
the t132ref builds break with the following errors -
<android>/kernel/drivers/platform/tegra/../../../arch/arm/mach-tegra/reset.c:45: undefined reference to `is_secure_mode'
<android>/kernel/drivers/platform/tegra/../../../arch/arm/mach-tegra/reset.c:57: undefined reference to `is_secure_mode'
<android>/kernel/drivers/platform/tegra/../../../arch/arm/mach-tegra/reset.c:58: undefined reference to `tegra_generic_smc'
Change-Id: I4e44c2ffba4e1c013213e543b67f2d49a928b764
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/365347
Diffstat (limited to 'arch/arm/mm')
-rw-r--r-- | arch/arm/mm/cache-l2x0.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index d6c71f901575..161004180cf5 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -1,6 +1,5 @@ /* * arch/arm/mm/cache-l2x0.c - L210/L220 cache controller support - * Copyright (c) 2007-2014, NVIDIA CORPORATION. All rights reserved. * * Copyright (C) 2007 ARM Limited * @@ -98,12 +97,12 @@ static inline void l2x0_inv_line(unsigned long addr) writel_relaxed(addr, base + L2X0_INV_LINE_PA); } -#if (defined(CONFIG_PL310_ERRATA_588369) || defined(CONFIG_PL310_ERRATA_727915)) +#if !defined(CONFIG_TEGRA_USE_SECURE_KERNEL) && \ + (defined(CONFIG_PL310_ERRATA_588369) || defined(CONFIG_PL310_ERRATA_727915)) static inline void debug_writel(unsigned long val) { - if (is_secure_mode()) - if (outer_cache.set_debug) - outer_cache.set_debug(val); + if (outer_cache.set_debug) + outer_cache.set_debug(val); } static void pl310_set_debug(unsigned long val) |