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authorDeepak Nibade <dnibade@nvidia.com>2014-03-10 20:06:24 +0530
committerDeepak Nibade <dnibade@nvidia.com>2014-03-10 20:06:24 +0530
commit979bc71efd133d33922556c11af7bbec48734e53 (patch)
tree7fb09746d84f9a68e9d8e4c9e1d1e871c6b17ec0 /Documentation
parentaf8ff60bcc47e0e7e97fc2a39fdee68f3340d23b (diff)
parent243d4c9490e60a84e3812cad8786f23da374adac (diff)
Merge branch 'android-3.10' into dev-kernel-3.10
Bug 1456092 Change-Id: Idd03c5e52e7aac49f4adede54802ca66f22d2ee3 Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
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+ Tagged virtual addresses in AArch64 Linux
+ =========================================
+
+Author: Will Deacon <will.deacon@arm.com>
+Date : 12 June 2013
+
+This document briefly describes the provision of tagged virtual
+addresses in the AArch64 translation system and their potential uses
+in AArch64 Linux.
+
+The kernel configures the translation tables so that translations made
+via TTBR0 (i.e. userspace mappings) have the top byte (bits 63:56) of
+the virtual address ignored by the translation hardware. This frees up
+this byte for application use, with the following caveats:
+
+ (1) The kernel requires that all user addresses passed to EL1
+ are tagged with tag 0x00. This means that any syscall
+ parameters containing user virtual addresses *must* have
+ their top byte cleared before trapping to the kernel.
+
+ (2) Non-zero tags are not preserved when delivering signals.
+ This means that signal handlers in applications making use
+ of tags cannot rely on the tag information for user virtual
+ addresses being maintained for fields inside siginfo_t.
+ One exception to this rule is for signals raised in response
+ to watchpoint debug exceptions, where the tag information
+ will be preserved.
+
+ (3) Special care should be taken when using tagged pointers,
+ since it is likely that C compilers will not hazard two
+ virtual addresses differing only in the upper byte.
+
+The architecture prevents the use of a tagged PC, so the upper byte will
+be set to a sign-extension of bit 55 on exception return.